Power switch design method and program

J. Pineda de Gyvez (Inventor), R.I.M.P. Meijer (Inventor), C. Groot (Inventor)

Research output: PatentPatent publication

3 Downloads (Pure)


A method of designing a power switch block (200) for an integrated circuit layout in a predefined integrated circuit technology is disclosed. The power switch block (200) includes a segment (710) comprising a plurality of spaced parallel conductors (110, 120, 130, 140) each having a predefined height in said technology, a stack of a first power switch (115) of a first conductivity type and a pair of drivers (152; 154) for respectively driving the first power switch (115) and a second power switch (135), said drivers having predefined dimensions in said technology, and the second switch (135) of a second conductivity type. The method comprises providing respective predefined width/length ratios for said power switches (115; 135); determining a total height of the segment (710) from the sum of the predefined heights of the individual conductors (110; 120; 130; 140) and respective spacings (310; 320) between said individual conductors, determining the height of the first transistor (115) from the difference between the total height and the predefined driver height; determining the width of the first transistor (115) from the combined predefined widths of the pair of drivers (152; 154); optimizing the first power switch layout within its determined height and width based on its predefined width/length ratio; and optimizing the second power switch layout based on its predefined width/height ratio.
Original languageEnglish
Patent numberUS20110083116 A1
Publication statusPublished - 7 Apr 2011


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