Power reduction through clock gating by symbolic manipulation

J.F.M. Theeuwen; H.A.J.M. Seelen

Power reduction through clock gating by symbolic manipulation

J.F.M. Theeuwen
, H.A.J.M. Seelen

Electronic Systems

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

Original language	English
Title of host publication	Proc. International Workshop on Logic and Architectural Synthesis
Pages	184-191
Publication status	Published - 1996
Event	International Workshop on Logic and Architecture Synthesis (IWLAS '96), December 16, 1996, Grenoble, France - Grenoble, France Duration: 16 Dec 1996 → 16 Dec 1996

Workshop

Workshop	International Workshop on Logic and Architecture Synthesis (IWLAS '96), December 16, 1996, Grenoble, France
Abbreviated title	IWLAS '96
Country/Territory	France
City	Grenoble
Period	16/12/96 → 16/12/96
Other

Cite this

@inproceedings{8fb3242af81349c1aa4c0a5264c89f65,

title = "Power reduction through clock gating by symbolic manipulation",

author = "J.F.M. Theeuwen and H.A.J.M. Seelen",

year = "1996",

language = "English",

pages = "184--191",

booktitle = "Proc. International Workshop on Logic and Architectural Synthesis",

note = "International Workshop on Logic and Architecture Synthesis (IWLAS '96), December 16, 1996, Grenoble, France, IWLAS '96 ; Conference date: 16-12-1996 Through 16-12-1996",

}

TY - GEN

T1 - Power reduction through clock gating by symbolic manipulation

AU - Theeuwen, J.F.M.

AU - Seelen, H.A.J.M.

PY - 1996

Y1 - 1996

M3 - Conference contribution

SP - 184

EP - 191

BT - Proc. International Workshop on Logic and Architectural Synthesis

T2 - International Workshop on Logic and Architecture Synthesis (IWLAS '96), December 16, 1996, Grenoble, France

Y2 - 16 December 1996 through 16 December 1996

ER -