Power Optimization for Pipelined ADCs

A. Zanikopoulos; P.J.A. Harpe; J.A. Hegt; A.H.M. Roermund, van

Power Optimization for Pipelined ADCs

A. Zanikopoulos, P.J.A. Harpe, J.A. Hegt, A.H.M. Roermund, van

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

Abstract

The developments over the last years in portable and wireless communications have increased the demand for low power circuits and systems. Analog-to-digital converters (ADCs), as essential parts of these systems, should comply with this low power consumption trend. The pipelined ADC in particular is one of the most popular ADC architectures, because it exhibits very good speed and power consumption capabilities and can be easily implemented in digital CMOS technologies. Therefore a systematic study of power optimization for pipelined ADCs became necessary.

Original language	English
Title of host publication	Proceedings of the 17th ProRISC, Annual Workshop on Circuits, Systems and Signal Processing (ProRISC 2006) 23 - 24 November 2006, Veldhoven, the Netherlands
Place of Publication	Utrecht, the Netherlands
Publisher	Technology Foundation
Pages	110-116
ISBN (Print)	90-73461-44-8
Publication status	Published - 2006
Event	2006 Annual Workshop on Circuits, Systems and Signal Processing (ProRISC 2006) - Veldhoven, Netherlands Duration: 23 Nov 2006 → 24 Nov 2006 Conference number: 17

Conference

Conference	2006 Annual Workshop on Circuits, Systems and Signal Processing (ProRISC 2006)
Abbreviated title	ProRISC 2006
Country/Territory	Netherlands
City	Veldhoven
Period	23/11/06 → 24/11/06

Cite this

@inproceedings{e8275a8681fb4718a42b09393a85fd06,

title = "Power Optimization for Pipelined ADCs",

abstract = "The developments over the last years in portable and wireless communications have increased the demand for low power circuits and systems. Analog-to-digital converters (ADCs), as essential parts of these systems, should comply with this low power consumption trend. The pipelined ADC in particular is one of the most popular ADC architectures, because it exhibits very good speed and power consumption capabilities and can be easily implemented in digital CMOS technologies. Therefore a systematic study of power optimization for pipelined ADCs became necessary.",

author = "A. Zanikopoulos and P.J.A. Harpe and J.A. Hegt and {Roermund, van}, A.H.M.",

year = "2006",

language = "English",

isbn = "90-73461-44-8",

pages = "110--116",

booktitle = "Proceedings of the 17th ProRISC, Annual Workshop on Circuits, Systems and Signal Processing (ProRISC 2006) 23 - 24 November 2006, Veldhoven, the Netherlands",

publisher = "Technology Foundation",

note = "2006 Annual Workshop on Circuits, Systems and Signal Processing (ProRISC 2006), ProRISC 2006 ; Conference date: 23-11-2006 Through 24-11-2006",

}

Zanikopoulos, A, Harpe, PJA, Hegt, JA & Roermund, van, AHM 2006, Power Optimization for Pipelined ADCs. in Proceedings of the 17th ProRISC, Annual Workshop on Circuits, Systems and Signal Processing (ProRISC 2006) 23 - 24 November 2006, Veldhoven, the Netherlands. Technology Foundation, Utrecht, the Netherlands, pp. 110-116, 2006 Annual Workshop on Circuits, Systems and Signal Processing (ProRISC 2006), Veldhoven, Netherlands, 23/11/06.

Power Optimization for Pipelined ADCs. / Zanikopoulos, A.; Harpe, P.J.A.; Hegt, J.A. et al.
Proceedings of the 17th ProRISC, Annual Workshop on Circuits, Systems and Signal Processing (ProRISC 2006) 23 - 24 November 2006, Veldhoven, the Netherlands. Utrecht, the Netherlands: Technology Foundation, 2006. p. 110-116.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

TY - GEN

T1 - Power Optimization for Pipelined ADCs

AU - Zanikopoulos, A.

AU - Harpe, P.J.A.

AU - Hegt, J.A.

AU - Roermund, van, A.H.M.

N1 - Conference code: 17

PY - 2006

Y1 - 2006

N2 - The developments over the last years in portable and wireless communications have increased the demand for low power circuits and systems. Analog-to-digital converters (ADCs), as essential parts of these systems, should comply with this low power consumption trend. The pipelined ADC in particular is one of the most popular ADC architectures, because it exhibits very good speed and power consumption capabilities and can be easily implemented in digital CMOS technologies. Therefore a systematic study of power optimization for pipelined ADCs became necessary.

AB - The developments over the last years in portable and wireless communications have increased the demand for low power circuits and systems. Analog-to-digital converters (ADCs), as essential parts of these systems, should comply with this low power consumption trend. The pipelined ADC in particular is one of the most popular ADC architectures, because it exhibits very good speed and power consumption capabilities and can be easily implemented in digital CMOS technologies. Therefore a systematic study of power optimization for pipelined ADCs became necessary.

M3 - Conference contribution

SN - 90-73461-44-8

SP - 110

EP - 116

BT - Proceedings of the 17th ProRISC, Annual Workshop on Circuits, Systems and Signal Processing (ProRISC 2006) 23 - 24 November 2006, Veldhoven, the Netherlands

PB - Technology Foundation

CY - Utrecht, the Netherlands

T2 - 2006 Annual Workshop on Circuits, Systems and Signal Processing (ProRISC 2006)

Y2 - 23 November 2006 through 24 November 2006

ER -

Power Optimization for Pipelined ADCs

Abstract

Conference

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