Abstract
A method permits coprocessors to be embedded inside a programmable VLIW processor. Synchronization of the coprocessors and the VLIW processor is determined at compile-time by the VLIW scheduler. The implementation of a power-efficient turbo decoder demonstrates the effectiveness of this method
| Original language | English |
|---|---|
| Title of host publication | IEEE International Solid-State Circuits Conference ; 48 (San Francisco, Calif.) : 2001.02.05-07 |
| Place of Publication | Piscataway |
| Publisher | Institute of Electrical and Electronics Engineers |
| Pages | 180-181 |
| ISBN (Print) | 0-7803-6608-5 |
| DOIs | |
| Publication status | Published - 2001 |
| Event | 48th IEEE International Solid-State Circuits Conference, ISSCC 2001 - San Francisco, United States Duration: 5 Feb 2001 → 7 Feb 2001 Conference number: 48 |
Publication series
| Name | Digest of technical papers |
|---|---|
| Volume | 44 |
| ISSN (Print) | 0193-6530 |
Conference
| Conference | 48th IEEE International Solid-State Circuits Conference, ISSCC 2001 |
|---|---|
| Abbreviated title | ISSCC 2001 |
| Country/Territory | United States |
| City | San Francisco |
| Period | 5/02/01 → 7/02/01 |
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