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Power-efficient application-specific VLIW processor for turbo decoding

  • M.J.G. Bekooij
  • , J.T.M.H. Dielissen
  • , F. Harmsze
  • , S. Sawitzki
  • , J. Huisken
  • , A. Werf, van der
  • , J. Meerbergen, van

Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

Abstract

A method permits coprocessors to be embedded inside a programmable VLIW processor. Synchronization of the coprocessors and the VLIW processor is determined at compile-time by the VLIW scheduler. The implementation of a power-efficient turbo decoder demonstrates the effectiveness of this method
Original languageEnglish
Title of host publicationIEEE International Solid-State Circuits Conference ; 48 (San Francisco, Calif.) : 2001.02.05-07
Place of PublicationPiscataway
PublisherInstitute of Electrical and Electronics Engineers
Pages180-181
ISBN (Print)0-7803-6608-5
DOIs
Publication statusPublished - 2001
Event48th IEEE International Solid-State Circuits Conference, ISSCC 2001 - San Francisco, United States
Duration: 5 Feb 20017 Feb 2001
Conference number: 48

Publication series

NameDigest of technical papers
Volume44
ISSN (Print)0193-6530

Conference

Conference48th IEEE International Solid-State Circuits Conference, ISSCC 2001
Abbreviated titleISSCC 2001
Country/TerritoryUnited States
CitySan Francisco
Period5/02/017/02/01

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