Power dissipation reduction by clock gating

J.F.M. Theeuwen

Power dissipation reduction by clock gating

J.F.M. Theeuwen

Electronic Systems

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

Original language	English
Title of host publication	Proc. ProRISC/IEEE-Benelux Workshop on Circuits, Systems and Signal Processing
Editors	J.P. Veen
Place of Publication	Utrecht, Netherlands
Publisher	STW Technology Foundation
Pages	349-
ISBN (Print)	90-73461-09-X
Publication status	Published - 1996
Event	1996 ProRISC/IEEE-Benelux Workshop on Circuits, Systems and Signal Processing - Mierlo Duration: 1 Jan 1996 → 28 Nov 1996

Conference

Conference	1996 ProRISC/IEEE-Benelux Workshop on Circuits, Systems and Signal Processing
Abbreviated title	ProRISC/IEEE 1996
City	Mierlo
Period	1/01/96 → 28/11/96

Cite this

@inproceedings{da940a904d974ec3bb7222d0044bcaae,

title = "Power dissipation reduction by clock gating",

author = "J.F.M. Theeuwen",

year = "1996",

language = "English",

isbn = "90-73461-09-X",

pages = "349--",

editor = "J.P. Veen",

booktitle = "Proc. ProRISC/IEEE-Benelux Workshop on Circuits, Systems and Signal Processing",

publisher = "STW Technology Foundation",

note = "1996 ProRISC/IEEE-Benelux Workshop on Circuits, Systems and Signal Processing, ProRISC/IEEE 1996 ; Conference date: 01-01-1996 Through 28-11-1996",

}

TY - GEN

T1 - Power dissipation reduction by clock gating

AU - Theeuwen, J.F.M.

PY - 1996

Y1 - 1996

M3 - Conference contribution

SN - 90-73461-09-X

SP - 349-

BT - Proc. ProRISC/IEEE-Benelux Workshop on Circuits, Systems and Signal Processing

A2 - Veen, J.P.

PB - STW Technology Foundation

CY - Utrecht, Netherlands

T2 - 1996 ProRISC/IEEE-Benelux Workshop on Circuits, Systems and Signal Processing

Y2 - 1 January 1996 through 28 November 1996

ER -