Positive-feedback level shifter logic for large-area electronics

D. Raiteri, P. Lieshout, van, A.H.M. Roermund, van, E. Cantatore

Research output: Contribution to journalArticleAcademicpeer-review

42 Citations (Scopus)


Positive-feedback Level Shifter (PLS) logic is proposed in this paper for the design of unipolar digital circuits manufactured at low temperature on foil using organic or metal-oxide semiconductors. Positive feedback and a suitable control voltage provide high gain and a symmetrical input-output characteristic even in presence of large TFT variations, enabling robust digital design. The measured gain improves from 13 dB in traditional Zero-Vgs inverters to 76 dB in PLS inverters; the average noise margin increases from 2.58 V (Zero-Vgs) to 6.82 V (PLS) at 20 V supply. Assuming that a positive noise margin for each gate is the only requirement to obtain a fully functional digital circuit, the maximum number of logic gates compatible with a 90% yield improves from 200 Zero-Vgs inverters to above 24 million PLS inverters. A 240-stage PLS shift-register exploiting 13,440 organic TFTs is indeed successfully measured. This is to the authors' knowledge the organic circuit with the highest transistor count ever demonstrated. The control voltage, always within the supply rails, enables automatic correction of the process variations using linear control circuits. The proposed approach will enable a strong increase in the complexity of large-area electronics on foil, with great benefit to applications like flexible displays and large-area sensing surfaces.
Original languageEnglish
Pages (from-to)524-535
Number of pages12
JournalIEEE Journal of Solid-State Circuits
Issue number2
Publication statusPublished - 2014


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