Polymeric integrated circuits: Fabrication and first characterisation

D. M. De Leeuw; G. H. Gelinck; T.C.T. Geuns; E. Van Veenendaal; E. Cantatore; B. H. Huisman

doi:10.1109/IEDM.2002.1175836

Polymeric integrated circuits: Fabrication and first characterisation

D. M. De Leeuw, G. H. Gelinck, T.C.T. Geuns, E. Van Veenendaal, E. Cantatore, B. H. Huisman

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

34 Citations (Scopus)

Abstract

A technology to fabricate polymeric integrated circuits on 150-mm foils is presented. The technology is demonstrated with functional code generators. The integration level is about 700 transistors. The yield of the circuits has been measured as function of the complexity and has been correlated with intrinsic noise margin of the logic gates.

Original language	English
Title of host publication	2002 IEEE International Devices Meeting (IEDM)
Place of Publication	Piscataway
Publisher	Institute of Electrical and Electronics Engineers
Pages	293-296
Number of pages	4
ISBN (Print)	0-7803-7462-2
DOIs	https://doi.org/10.1109/IEDM.2002.1175836
Publication status	Published - 1 Dec 2002
Externally published	Yes
Event	2002 IEEE International Electron Devices Meeting, IEDM 2002 - San Francisco, United States Duration: 8 Dec 2002 → 11 Dec 2002

Conference

Conference	2002 IEEE International Electron Devices Meeting, IEDM 2002
Country/Territory	United States
City	San Francisco
Period	8/12/02 → 11/12/02

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10.1109/IEDM.2002.1175836

Cite this

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title = "Polymeric integrated circuits: Fabrication and first characterisation",

abstract = "A technology to fabricate polymeric integrated circuits on 150-mm foils is presented. The technology is demonstrated with functional code generators. The integration level is about 700 transistors. The yield of the circuits has been measured as function of the complexity and has been correlated with intrinsic noise margin of the logic gates.",

author = "{De Leeuw}, {D. M.} and Gelinck, {G. H.} and T.C.T. Geuns and {Van Veenendaal}, E. and E. Cantatore and Huisman, {B. H.}",

year = "2002",

month = dec,

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doi = "10.1109/IEDM.2002.1175836",

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pages = "293--296",

booktitle = "2002 IEEE International Devices Meeting (IEDM)",

publisher = "Institute of Electrical and Electronics Engineers",

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note = "2002 IEEE International Electron Devices Meeting, IEDM 2002 ; Conference date: 08-12-2002 Through 11-12-2002",

}

De Leeuw, DM, Gelinck, GH, Geuns, TCT, Van Veenendaal, E, Cantatore, E & Huisman, BH 2002, Polymeric integrated circuits: Fabrication and first characterisation. in 2002 IEEE International Devices Meeting (IEDM). Institute of Electrical and Electronics Engineers, Piscataway, pp. 293-296, 2002 IEEE International Electron Devices Meeting, IEDM 2002, San Francisco, California, United States, 8/12/02. https://doi.org/10.1109/IEDM.2002.1175836

Polymeric integrated circuits: Fabrication and first characterisation. / De Leeuw, D. M.; Gelinck, G. H.; Geuns, T.C.T. et al.
2002 IEEE International Devices Meeting (IEDM). Piscataway: Institute of Electrical and Electronics Engineers, 2002. p. 293-296.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

TY - GEN

T1 - Polymeric integrated circuits

T2 - 2002 IEEE International Electron Devices Meeting, IEDM 2002

AU - De Leeuw, D. M.

AU - Gelinck, G. H.

AU - Geuns, T.C.T.

AU - Van Veenendaal, E.

AU - Cantatore, E.

AU - Huisman, B. H.

PY - 2002/12/1

Y1 - 2002/12/1

N2 - A technology to fabricate polymeric integrated circuits on 150-mm foils is presented. The technology is demonstrated with functional code generators. The integration level is about 700 transistors. The yield of the circuits has been measured as function of the complexity and has been correlated with intrinsic noise margin of the logic gates.

AB - A technology to fabricate polymeric integrated circuits on 150-mm foils is presented. The technology is demonstrated with functional code generators. The integration level is about 700 transistors. The yield of the circuits has been measured as function of the complexity and has been correlated with intrinsic noise margin of the logic gates.

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BT - 2002 IEEE International Devices Meeting (IEDM)

PB - Institute of Electrical and Electronics Engineers

CY - Piscataway

Y2 - 8 December 2002 through 11 December 2002

ER -

Polymeric integrated circuits: Fabrication and first characterisation

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