Abstract
Multi-processor system-on-chip (MPSoC) design is profiting
considerably from the trend towards model-driven design.
Design choices in this area cover considerations on alternative
parallellisations of application software, alternative architectures
for the hardware platform and different ways to
map applications onto the platform. Various paradigms exist
for modelling applications and also for modelling platforms.
This paper presents a tool for generating abstract performance
models of MPSoC systems to further automate their
design-space exploration. The tool supports several traditional
paradigms for specifying applications and uses a new
model of architecture to enable describing hardware platforms
at a much higher abstraction level than traditional
hardware description languages. The tool relies on a collection
of modelling patterns to convert application and platform
specifications together with a mapping into one unifying
model expressed in a formal general-purpose modelling language
that offers extensive support for performance analysis.
| Original language | English |
|---|---|
| Title of host publication | Quantitative Evaluation of Systems,proceedings of the 5th International Conference on the Quantitative Evaluation of Systems, St. Malo (Fr.) 14-17 Sept. 2008 |
| Place of Publication | Los Alamitos |
| Publisher | IEEE Computer Society |
| Pages | 39-40 |
| ISBN (Print) | 978-0-7695-3360-5 |
| Publication status | Published - 2008 |
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