Performance analysis of small non-uniform packet switches

Packet switches have been studied extensively as part of ATM and LAN networks under the assumption that the number of input ports N tends to infinity. Our study of packet switches is motivated by networks on chips, where N is usually 4 or 5 and asymptotic models lead to inaccurate results. We consider small non-uniform switches and accurately approximate stability conditions and throughput. In addition to this, we approximate the mean waiting time in the switch by that in a ./Geo/1 queue.