Passive and heterogeneous integration towards a Si-based System-in-Package concept

F. Roozeboom, A.L.A.M. Kemmeren, J.F.C. Verhoeven, F.C. Heuvel, van den, J.H. Klootwijk, H. Kretschman, T. Fric, E.C.E. Grunsven, van, S. Bardy, C. Bunel, D. Chevrie, F. LeCornec, S. Ledain, F. Murray, P. Philippe

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    Abstract

    Recently Philips launched their first highly integrated cellular RF-transceiver systems using a new Si-based System-in-Package (SiP) technology. This technology utilizes back-end processing to integrate passive components onto a Si-substrate that serves as a platform for heterogeneous integration with active dies, MEMS dies, etc. As an example, a transceiver IC is flip-chip mounted onto this passive component substrate, thus minimizing interconnect parasitics and footprint area. Next, this sub-assembly is flipped back into a standard single IC-sized lead frame package. This paper reports on such Si-based SiP transceiver modules and the underlying technologies. Here, the passive die is made by the so-called PICS (Passive Integration Connecting Substrate) technology that integrates passive components on one die, such as high-Q inductors, resistors, accurate MIM capacitors and, in particular, high-density (~20-30 nF/mm/sup 2/) MOS `trench' capacitors for decoupling. These MOS capacitors integrated in RF power amplifiers showed superior signal stability compared to discrete ceramic capacitors. Ultralow-loss factors were measured: series inductance ESL
    Original languageEnglish
    Pages (from-to)391-396
    JournalThin Solid Films
    Volume504
    Issue number1-2
    DOIs
    Publication statusPublished - 2006

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