Parametric structure-preserving model order reduction

J. Fernández Villena, W.H.A. Schilders, L.M. Silveira

Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

1 Citation (Scopus)

Abstract

Analysis and verification environments for next- generation nano-scale RFIC designs must be able to cope with increasing design complexity and to account for new effects, such as process variations and Electromagnetic (EM) couplings. Designed-in passives, substrate, interconnect and devices can no longer be treated in isolation as the interactions between them are becoming more relevant in the behavior of the complete system. At the same time variations in process parameters lead to small changes in the device characteristics that may directly affect system performance. These two effects, however, can not be treated separately as the process variations that modify the physical parameters of the devices also affect those same EM couplings. Accurately capturing the effects of process variations as well as the relevant EM coupling effects requires detailed models that become very expensive to simulate. Reduction techniques able to handle parametric descriptions of linear systems are necessary in order to obtain better simulation performance. In this work Model Order Reduction techniques able to handle parametric system descriptions are presented. Such techniques are based on Structure-Preserving formulations that are able to exploit the hierarchical system representation of designed- in blocks, substrate and interconnect, in order to obtain more efficient simulation models.
Original languageEnglish
Title of host publicationProceedings of the 15th International Conference on Very Large Scale Integration (VLSI-SoC 2007) 15-17 October 2007, Atlanta, Georgia, USA
Place of PublicationPiscataway, New Jersey, USA
PublisherInstitute of Electrical and Electronics Engineers
Pages31-36
ISBN (Print)978-1-4244-1710-0
DOIs
Publication statusPublished - 2007
Event15th IFIP WG 10.5 International Conference on Very Large Scale Integration and System-on-Chip (VLSI-SoC 2007) - Atlanta, United States
Duration: 15 Oct 200717 Oct 2007
Conference number: 15

Conference

Conference15th IFIP WG 10.5 International Conference on Very Large Scale Integration and System-on-Chip (VLSI-SoC 2007)
Abbreviated titleVLSI-SoC 2007
CountryUnited States
CityAtlanta
Period15/10/0717/10/07

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