Parallel current-steering D/A Converters for flexibility and smartness

G.I. Radulov; P.J. Quinn; P.J.A. Harpe; J.A. Hegt; A.H.M. Roermund, van

doi:10.1109/ISCAS.2007.378579

Parallel current-steering D/A Converters for flexibility and smartness

G.I. Radulov, P.J. Quinn, P.J.A. Harpe, J.A. Hegt, A.H.M. Roermund, van

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

10 Citations (Scopus)

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Abstract

This paper presents a DAC architecture built on parallel current-steering sub-DAC entities. Two main novelties are explored: flexibility and smartness. Firstly, a number of available operating modes (op-modes) can set the overall DAC performance and functionality. These op-modes transfer some of the important design trade-offs to the end-user and constitute the DAC flexibility. The main examples include: resolution-power-number of DACs, static-dynamic performance, etc. Secondly, specific signal processing techniques become possible. The main examples of such techniques include: full self-calibration, cancellation of harmonic distortion (HD) components, and linearity improvement through redundancy. This paper concentrates on a method to suppress undesired HD components through DA processing of phase shifted replicas of the main input signal. The presented theoretical concepts are realized in a 14-bit DAC built from 4 parallel 12-bit sub-DACs. Transistor simulations and a layout design are also presented. The demonstrated flexibility characteristics of the new DAC architecture make the discussed concepts particularly suitable for FPGA integration.

Original language	English
Title of host publication	Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS 2007) 27 - 30 May 2007, New Orleans, Louisiana, USA
Place of Publication	Piscataway, New Jersey, USA
Publisher	Institute of Electrical and Electronics Engineers
Pages	1465-1468
ISBN (Print)	1-4244-0920-9
DOIs	https://doi.org/10.1109/ISCAS.2007.378579
Publication status	Published - 2007
Event	2007 IEEE International Symposium on Circuits and Systems (ISCAS 2007) - New Orleans, United States Duration: 27 May 2007 → 30 May 2007 http://www.iscas2007.org/

Conference

Conference	2007 IEEE International Symposium on Circuits and Systems (ISCAS 2007)
Abbreviated title	ISCAS 2007
Country/Territory	United States
City	New Orleans
Period	27/05/07 → 30/05/07
Internet address	http://www.iscas2007.org/

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10.1109/ISCAS.2007.378579

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Radulov, G. I., Quinn, P. J., Harpe, P. J. A., Hegt, J. A., & Roermund, van, A. H. M. (2007). Parallel current-steering D/A Converters for flexibility and smartness. In Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS 2007) 27 - 30 May 2007, New Orleans, Louisiana, USA (pp. 1465-1468). Institute of Electrical and Electronics Engineers. https://doi.org/10.1109/ISCAS.2007.378579

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abstract = "This paper presents a DAC architecture built on parallel current-steering sub-DAC entities. Two main novelties are explored: flexibility and smartness. Firstly, a number of available operating modes (op-modes) can set the overall DAC performance and functionality. These op-modes transfer some of the important design trade-offs to the end-user and constitute the DAC flexibility. The main examples include: resolution-power-number of DACs, static-dynamic performance, etc. Secondly, specific signal processing techniques become possible. The main examples of such techniques include: full self-calibration, cancellation of harmonic distortion (HD) components, and linearity improvement through redundancy. This paper concentrates on a method to suppress undesired HD components through DA processing of phase shifted replicas of the main input signal. The presented theoretical concepts are realized in a 14-bit DAC built from 4 parallel 12-bit sub-DACs. Transistor simulations and a layout design are also presented. The demonstrated flexibility characteristics of the new DAC architecture make the discussed concepts particularly suitable for FPGA integration.",

author = "G.I. Radulov and P.J. Quinn and P.J.A. Harpe and J.A. Hegt and {Roermund, van}, A.H.M.",

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publisher = "Institute of Electrical and Electronics Engineers",

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Radulov, GI, Quinn, PJ, Harpe, PJA, Hegt, JA & Roermund, van, AHM 2007, Parallel current-steering D/A Converters for flexibility and smartness. in Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS 2007) 27 - 30 May 2007, New Orleans, Louisiana, USA. Institute of Electrical and Electronics Engineers, Piscataway, New Jersey, USA, pp. 1465-1468, 2007 IEEE International Symposium on Circuits and Systems (ISCAS 2007), New Orleans, Louisiana, United States, 27/05/07. https://doi.org/10.1109/ISCAS.2007.378579

Parallel current-steering D/A Converters for flexibility and smartness. / Radulov, G.I.; Quinn, P.J.; Harpe, P.J.A. et al.
Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS 2007) 27 - 30 May 2007, New Orleans, Louisiana, USA. Piscataway, New Jersey, USA: Institute of Electrical and Electronics Engineers, 2007. p. 1465-1468.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

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AU - Roermund, van, A.H.M.

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N2 - This paper presents a DAC architecture built on parallel current-steering sub-DAC entities. Two main novelties are explored: flexibility and smartness. Firstly, a number of available operating modes (op-modes) can set the overall DAC performance and functionality. These op-modes transfer some of the important design trade-offs to the end-user and constitute the DAC flexibility. The main examples include: resolution-power-number of DACs, static-dynamic performance, etc. Secondly, specific signal processing techniques become possible. The main examples of such techniques include: full self-calibration, cancellation of harmonic distortion (HD) components, and linearity improvement through redundancy. This paper concentrates on a method to suppress undesired HD components through DA processing of phase shifted replicas of the main input signal. The presented theoretical concepts are realized in a 14-bit DAC built from 4 parallel 12-bit sub-DACs. Transistor simulations and a layout design are also presented. The demonstrated flexibility characteristics of the new DAC architecture make the discussed concepts particularly suitable for FPGA integration.

AB - This paper presents a DAC architecture built on parallel current-steering sub-DAC entities. Two main novelties are explored: flexibility and smartness. Firstly, a number of available operating modes (op-modes) can set the overall DAC performance and functionality. These op-modes transfer some of the important design trade-offs to the end-user and constitute the DAC flexibility. The main examples include: resolution-power-number of DACs, static-dynamic performance, etc. Secondly, specific signal processing techniques become possible. The main examples of such techniques include: full self-calibration, cancellation of harmonic distortion (HD) components, and linearity improvement through redundancy. This paper concentrates on a method to suppress undesired HD components through DA processing of phase shifted replicas of the main input signal. The presented theoretical concepts are realized in a 14-bit DAC built from 4 parallel 12-bit sub-DACs. Transistor simulations and a layout design are also presented. The demonstrated flexibility characteristics of the new DAC architecture make the discussed concepts particularly suitable for FPGA integration.

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Radulov GI, Quinn PJ, Harpe PJA, Hegt JA, Roermund, van AHM. Parallel current-steering D/A Converters for flexibility and smartness. In Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS 2007) 27 - 30 May 2007, New Orleans, Louisiana, USA. Piscataway, New Jersey, USA: Institute of Electrical and Electronics Engineers. 2007. p. 1465-1468 doi: 10.1109/ISCAS.2007.378579

Parallel current-steering D/A Converters for flexibility and smartness

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