Overlapped scheduling techniques for high-level synthesis and multiprocessor realizations of DSP algorithms

S.H. Gerez; Sonia Heemstra; E.R. Bonsma; M.J.M. Heijligers

Overlapped scheduling techniques for high-level synthesis and multiprocessor realizations of DSP algorithms

S.H. Gerez, Sonia Heemstra, E.R. Bonsma, M.J.M. Heijligers

Electronic Systems

Research output: Chapter in Book/Report/Conference proceeding › Chapter › Academic › peer-review

Abstract

Algorithms that contain computations that can be executed simultaneously, offer possibilities of exploiting the parallelism present by implementing them on appro priate hardware, such as a multiprocessor system or an application-specific inte grated circuit (ASIC). Many digital signal processing (DSP) algorithms contain in ternal parallelism and are besides meant to be repeated infinitely (or a large number of times). These algorithms, therefore, not only have intra-iteration parallelism (between operations belonging to the same iteration) but inter-iteration parallelism (between operations belonging to different iterations) as well [Par9 1].

Original language	English
Title of host publication	Advanced Techniques for Embedded System Design and Test
Editors	J.C. Lopez, R. Hermida, W. Geisselhardt
Place of Publication	Dordrecht
Publisher	Kluwer Academic Publishers
Pages	125-150
Number of pages	26
ISBN (Print)	0-7923-8128-9
Publication status	Published - 1997

Cite this

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title = "Overlapped scheduling techniques for high-level synthesis and multiprocessor realizations of DSP algorithms",

abstract = "Algorithms that contain computations that can be executed simultaneously, offer possibilities of exploiting the parallelism present by implementing them on appro priate hardware, such as a multiprocessor system or an application-specific inte grated circuit (ASIC). Many digital signal processing (DSP) algorithms contain in ternal parallelism and are besides meant to be repeated infinitely (or a large number of times). These algorithms, therefore, not only have intra-iteration parallelism (between operations belonging to the same iteration) but inter-iteration parallelism (between operations belonging to different iterations) as well [Par9 1].",

author = "S.H. Gerez and Sonia Heemstra and E.R. Bonsma and M.J.M. Heijligers",

year = "1997",

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pages = "125--150",

editor = "J.C. Lopez and R. Hermida and W. Geisselhardt",

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publisher = "Kluwer Academic Publishers",

address = "Netherlands",

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Overlapped scheduling techniques for high-level synthesis and multiprocessor realizations of DSP algorithms. / Gerez, S.H.; Heemstra, Sonia; Bonsma, E.R. et al.

Advanced Techniques for Embedded System Design and Test. ed. / J.C. Lopez; R. Hermida; W. Geisselhardt. Dordrecht : Kluwer Academic Publishers, 1997. p. 125-150.

Research output: Chapter in Book/Report/Conference proceeding › Chapter › Academic › peer-review

TY - CHAP

T1 - Overlapped scheduling techniques for high-level synthesis and multiprocessor realizations of DSP algorithms

AU - Gerez, S.H.

AU - Heemstra, Sonia

AU - Bonsma, E.R.

AU - Heijligers, M.J.M.

PY - 1997

Y1 - 1997

N2 - Algorithms that contain computations that can be executed simultaneously, offer possibilities of exploiting the parallelism present by implementing them on appro priate hardware, such as a multiprocessor system or an application-specific inte grated circuit (ASIC). Many digital signal processing (DSP) algorithms contain in ternal parallelism and are besides meant to be repeated infinitely (or a large number of times). These algorithms, therefore, not only have intra-iteration parallelism (between operations belonging to the same iteration) but inter-iteration parallelism (between operations belonging to different iterations) as well [Par9 1].

AB - Algorithms that contain computations that can be executed simultaneously, offer possibilities of exploiting the parallelism present by implementing them on appro priate hardware, such as a multiprocessor system or an application-specific inte grated circuit (ASIC). Many digital signal processing (DSP) algorithms contain in ternal parallelism and are besides meant to be repeated infinitely (or a large number of times). These algorithms, therefore, not only have intra-iteration parallelism (between operations belonging to the same iteration) but inter-iteration parallelism (between operations belonging to different iterations) as well [Par9 1].

M3 - Chapter

SN - 0-7923-8128-9

SP - 125

EP - 150

BT - Advanced Techniques for Embedded System Design and Test

A2 - Lopez, J.C.

A2 - Hermida, R.

A2 - Geisselhardt, W.

PB - Kluwer Academic Publishers

CY - Dordrecht

ER -

Overlapped scheduling techniques for high-level synthesis and multiprocessor realizations of DSP algorithms

Abstract

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