Overlapped scheduling techniques for high-level synthesis and multiprocessor realizations of DSP algorithms

S.H. Gerez, Sonia Heemstra, E.R. Bonsma, M.J.M. Heijligers

Research output: Chapter in Book/Report/Conference proceedingChapterAcademicpeer-review

Abstract

Algorithms that contain computations that can be executed simultaneously, offer possibilities of exploiting the parallelism present by implementing them on appro priate hardware, such as a multiprocessor system or an application-specific inte grated circuit (ASIC). Many digital signal processing (DSP) algorithms contain in ternal parallelism and are besides meant to be repeated infinitely (or a large number of times). These algorithms, therefore, not only have intra-iteration parallelism (between operations belonging to the same iteration) but inter-iteration parallelism (between operations belonging to different iterations) as well [Par9 1].
Original languageEnglish
Title of host publicationAdvanced Techniques for Embedded System Design and Test
EditorsJ.C. Lopez, R. Hermida, W. Geisselhardt
Place of PublicationDordrecht
PublisherKluwer Academic Publishers
Pages125-150
Number of pages26
ISBN (Print)0-7923-8128-9
Publication statusPublished - 1997

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