On-chip testing using time-to-digital conversion

N. Minas (Inventor), E.J. Marinissen (Inventor)

Research output: PatentPatent publication


A method and system for testing the functionality of a through-silicon-via in an integrated circuit is disclosed. In one aspect, the functionality is tested by measuring its capacitance from one side only. The capacitance of the TSV can be determined by measuring a timing delay introduced in a measurement circuit due to the presence of the TSV. The timing delay is determined by comparing the timing of measurement signal from the measurement circuit with the timing of a reference signal provided by a reference circuit. The comparison is carried out using a digital timing measurement circuit, such as a time-to-digital converter.

Original languageEnglish
Patent numberUS2012025846
IPCG01R 27/ 02 A I
Priority date29/07/11
Publication statusPublished - 2 Feb 2012
Externally publishedYes


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