Noise analysis of a BJT-based charge pump for low-noise PLL applications

D. Dhar; P.T.M. van Zeijl; D. Milosevic; H. Gao; P.G.M. Baltus

doi:10.1109/ECCTD.2017.8093234

Noise analysis of a BJT-based charge pump for low-noise PLL applications

D. Dhar, P.T.M. van Zeijl, D. Milosevic, H. Gao, P.G.M. Baltus

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

6 Citations (Scopus)

Abstract

Noise of the charge pump degrades the in-band phase noise of charge pump phase-locked loop (CPPLL). This paper analyzes the noise mechanism of a bipolar junction transistor based charge pump and validates the analysis through simulation, providing necessary insight into the design of low-noise charge pump for CPPLL-based frequency synthesizers. A simple model for bipolar transistor noise is utilized to carry out the noise analysis. The scaling effects of the duty cycle and the rise/fall time of the input signals on the charge pump noise are also analyzed in detail. The analysis reveals that increased charge pump current reduces the PLL phase noise and that a trade-off exists between the area and the noise of the charge pump.

Original language	English
Title of host publication	2017 European Conference on Circuit Theory and Design, ECCTD 2017
Place of Publication	Piscataway
Publisher	Institute of Electrical and Electronics Engineers
Number of pages	4
ISBN (Electronic)	978-1-5386-3974-0
DOIs	https://doi.org/10.1109/ECCTD.2017.8093234
Publication status	Published - 31 Oct 2017
Event	23rd European Conference on Circuit Theory and Design, ECCTD 2017 - Catania, Italy Duration: 4 Sept 2017 → 6 Sept 2017 Conference number: 23 http://www.ecctd2017.dieei.unict.it/

Conference

Conference	23rd European Conference on Circuit Theory and Design, ECCTD 2017
Abbreviated title	ECCTD 2017
Country/Territory	Italy
City	Catania
Period	4/09/17 → 6/09/17
Internet address	http://www.ecctd2017.dieei.unict.it/

Keywords

Charge pump
phase noise
phase-locked loop

Access to Document

10.1109/ECCTD.2017.8093234

Cite this

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title = "Noise analysis of a BJT-based charge pump for low-noise PLL applications",

abstract = "Noise of the charge pump degrades the in-band phase noise of charge pump phase-locked loop (CPPLL). This paper analyzes the noise mechanism of a bipolar junction transistor based charge pump and validates the analysis through simulation, providing necessary insight into the design of low-noise charge pump for CPPLL-based frequency synthesizers. A simple model for bipolar transistor noise is utilized to carry out the noise analysis. The scaling effects of the duty cycle and the rise/fall time of the input signals on the charge pump noise are also analyzed in detail. The analysis reveals that increased charge pump current reduces the PLL phase noise and that a trade-off exists between the area and the noise of the charge pump.",

keywords = "Charge pump, phase noise, phase-locked loop",

author = "D. Dhar and {van Zeijl}, P.T.M. and D. Milosevic and H. Gao and P.G.M. Baltus",

year = "2017",

month = oct,

day = "31",

doi = "10.1109/ECCTD.2017.8093234",

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booktitle = "2017 European Conference on Circuit Theory and Design, ECCTD 2017",

publisher = "Institute of Electrical and Electronics Engineers",

address = "United States",

note = "23rd European Conference on Circuit Theory and Design, ECCTD 2017, ECCTD 2017 ; Conference date: 04-09-2017 Through 06-09-2017",

url = "http://www.ecctd2017.dieei.unict.it/",

}

Dhar, D , van Zeijl, PTM , Milosevic, D, Gao, H & Baltus, PGM 2017, Noise analysis of a BJT-based charge pump for low-noise PLL applications. in 2017 European Conference on Circuit Theory and Design, ECCTD 2017., 8093234, Institute of Electrical and Electronics Engineers, Piscataway, 23rd European Conference on Circuit Theory and Design, ECCTD 2017, Catania, Italy, 4/09/17. https://doi.org/10.1109/ECCTD.2017.8093234

Noise analysis of a BJT-based charge pump for low-noise PLL applications. / Dhar, D.; van Zeijl, P.T.M.; Milosevic, D. et al.
2017 European Conference on Circuit Theory and Design, ECCTD 2017. Piscataway: Institute of Electrical and Electronics Engineers, 2017. 8093234.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

TY - GEN

T1 - Noise analysis of a BJT-based charge pump for low-noise PLL applications

AU - Dhar, D.

AU - van Zeijl, P.T.M.

AU - Milosevic, D.

AU - Gao, H.

AU - Baltus, P.G.M.

N1 - Conference code: 23

PY - 2017/10/31

Y1 - 2017/10/31

N2 - Noise of the charge pump degrades the in-band phase noise of charge pump phase-locked loop (CPPLL). This paper analyzes the noise mechanism of a bipolar junction transistor based charge pump and validates the analysis through simulation, providing necessary insight into the design of low-noise charge pump for CPPLL-based frequency synthesizers. A simple model for bipolar transistor noise is utilized to carry out the noise analysis. The scaling effects of the duty cycle and the rise/fall time of the input signals on the charge pump noise are also analyzed in detail. The analysis reveals that increased charge pump current reduces the PLL phase noise and that a trade-off exists between the area and the noise of the charge pump.

AB - Noise of the charge pump degrades the in-band phase noise of charge pump phase-locked loop (CPPLL). This paper analyzes the noise mechanism of a bipolar junction transistor based charge pump and validates the analysis through simulation, providing necessary insight into the design of low-noise charge pump for CPPLL-based frequency synthesizers. A simple model for bipolar transistor noise is utilized to carry out the noise analysis. The scaling effects of the duty cycle and the rise/fall time of the input signals on the charge pump noise are also analyzed in detail. The analysis reveals that increased charge pump current reduces the PLL phase noise and that a trade-off exists between the area and the noise of the charge pump.

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KW - phase noise

KW - phase-locked loop

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M3 - Conference contribution

BT - 2017 European Conference on Circuit Theory and Design, ECCTD 2017

PB - Institute of Electrical and Electronics Engineers

CY - Piscataway

T2 - 23rd European Conference on Circuit Theory and Design, ECCTD 2017

Y2 - 4 September 2017 through 6 September 2017

ER -

Noise analysis of a BJT-based charge pump for low-noise PLL applications

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Keywords

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