NoC-based multiprocessor architecture for mixed-time-criticality applications

K.G.W. Goossens, M.L.P.J. Koedam, A.T. Nelson, S.S. Sinha, S. Goossens, Y. Li, G.D. Breaban, J.R. van Kampenhout, R. Tavakoli Najafabadi, J. Valencia, H. Ahmadi Balef, B. Akesson, S. Stuijk, M.C.W. Geilen, D. Goswami, M. Nabi Najafabadi

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Abstract

In this chapter we define what a mixed-time-criticality system is and what its requirements are. After defining the concepts that such systems should follow, we described CompSOC, which is one example of a mixed-time-criticality platform. We describe, in detail, how multiple resources, such as processors, memories, and interconnect, are combined into a larger hardware platform, and especially how they are shared between applications using different arbitration schemes. Following this, the software architecture that transforms the single hardware platform into multiple virtual execution platforms, one per application, is described.

Original languageEnglish
Title of host publicationHandbook of hardware/software codesign
EditorsS. Ha, J. Teich
Place of PublicationDordrecht
PublisherSpringer
Pages491-530
Number of pages40
ISBN (Electronic)978-94-017-7267-9
ISBN (Print)978-94-017-7266-2
DOIs
Publication statusPublished - 1 Nov 2017

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Goossens, K. G. W., Koedam, M. L. P. J., Nelson, A. T., Sinha, S. S., Goossens, S., Li, Y., ... Nabi Najafabadi, M. (2017). NoC-based multiprocessor architecture for mixed-time-criticality applications. In S. Ha, & J. Teich (Eds.), Handbook of hardware/software codesign (pp. 491-530). Dordrecht: Springer. https://doi.org/10.1007/978-94-017-7267-9_17