Abstract
This chapter proposes a high-level mapping correction method. This high-level mapping correction method uses a functional level DAC intrinsic redundancy, as defined in Fig. 9.1, to decouple the error correction from the DAC architecture (at algorithmic level). When multiple parallel sub-DACs implement a common D/A function, there is an intrinsic redundancy hidden in the way how each of the sub-DACs contributes to the common output. The presented method uses such functional redundancy to reduce the DAC errors.
Original language | English |
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Title of host publication | Smart and Flexible Digital-to-Analog Converters |
Publisher | Springer |
Chapter | 12 |
Pages | 169-175 |
Number of pages | 7 |
ISBN (Electronic) | 978-94-007-0347-6 |
ISBN (Print) | 978-94-007-0346-9 |
DOIs | |
Publication status | Published - 2011 |
Publication series
Name | Analog Circuits and Signal Processing |
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ISSN (Print) | 1872-082X |
ISSN (Electronic) | 2197-1854 |
Bibliographical note
Publisher Copyright:© 2011, Springer Science+Business Media B.V.
Keywords
- Algorithmic Level
- Algorithmic Segmentation
- Functional Segmentation
- Input Word
- Measured Initial Data