Networks on chips for high-end consumer-electronics TV system architectures

F. Steenhof, H. Duque, Björn Nilsson, K.G.W. Goossens, R. Peset Llopis

Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review


Consumer electronics products, such as high-end (digital) TVs, contain complex systems on chip (SOC) that offer high computational performance at low cost. Traditionally, these SOCs are application-specific standard products (ASSPs) with limited programmability. We describe why TV SOCs must become more flexible, and why companion chips together with networks on chips (NOC) are a crucial enabling technology. In particular, networks that span multiple chips will become important in the near future. We demonstrate our ideas by extending a commercially-available SOC for picture improvement in high-end TVs with the Æthereal NOC. Our first unoptimised results indicate that replacing the original interconnect (consisting of dedicated links and multiplexers for bypasses) by programmable NOC increases the SOC area by 4% and its power dissipation by 12%. The new, flexible SOC allows new tasks to be spliced in at any point in the task graph. Both analytical performance verification and system simulations at RTL VHDL show that the extended SOC meets its functional requirements. Using the Æthereal design flow the extended architecture was designed, implemented, and verified in 12 person months. To the best of our knowledge, this is the first application of a NOC to a commercial SOC. The quantitive results indicate that even retrofitting a NOC to an existing architecture is beneficial at acceptable cost.
Original languageEnglish
Title of host publicationDesign, Automation and Test in Europe, DATE'06, 6 March 2006 through 10 March 2006, Munich
Place of PublicationPiscataway
PublisherInstitute of Electrical and Electronics Engineers
Number of pages6
ISBN (Print)3-9810801-1-4
Publication statusPublished - 2006
Externally publishedYes


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