Abstract
Mismatch between operand width and hardware operation width is a source of energy inefficiency. This work proposes multi-granular arithmetic, which can adapt the hardware operation width to the application, preventing energy being wasted. In particular multi-granular arithmetic in the context of coarse-grain reconfigurable architectures is considered for the operations of addition, accumulation, multiplication, and multiply-accumulation. Using a silicon synthesis-toolflow it is shown that the multi-granular designs can perform narrow width operations, e.g. an 8-by-8 multiplication, much more efficiently than standard full-width circuits. For multiplication the required energy is reduced by up to 15 times under realistic conditions when compared to a full-width 32x32 multiplier.
Original language | English |
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Title of host publication | Proceedings - 19th Euromicro Conference on Digital System Design, DSD 2016 |
Place of Publication | Piscataway |
Publisher | Institute of Electrical and Electronics Engineers |
Pages | 599-606 |
Number of pages | 8 |
ISBN (Electronic) | 978-1-5090-2817-7 |
DOIs | |
Publication status | Published - 26 Oct 2016 |
Event | 19th Euromicro Conference on Digital System Design (DSD 2016) - Limassol, Cyprus Duration: 31 Aug 2016 → 2 Sep 2016 Conference number: 19 http://dsd-seaa2016.cs.ucy.ac.cy/index.php?p=DSD2016 |
Conference
Conference | 19th Euromicro Conference on Digital System Design (DSD 2016) |
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Abbreviated title | DSD 2016 |
Country/Territory | Cyprus |
City | Limassol |
Period | 31/08/16 → 2/09/16 |
Internet address |
Keywords
- BLOCKS
- CGRA
- Energy Efficiency
- Multi-Granular Arithmetic
- Multiplication