Multi-granular arithmetic in a coarse-grain reconfigurable architecture

S. Louwers, L. Waeijen, M. Wijtvliet, R. Koolen, H. Corporaal

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Abstract

Mismatch between operand width and hardware operation width is a source of energy inefficiency. This work proposes multi-granular arithmetic, which can adapt the hardware operation width to the application, preventing energy being wasted. In particular multi-granular arithmetic in the context of coarse-grain reconfigurable architectures is considered for the operations of addition, accumulation, multiplication, and multiply-accumulation. Using a silicon synthesis-toolflow it is shown that the multi-granular designs can perform narrow width operations, e.g. an 8-by-8 multiplication, much more efficiently than standard full-width circuits. For multiplication the required energy is reduced by up to 15 times under realistic conditions when compared to a full-width 32x32 multiplier.

Original languageEnglish
Title of host publicationProceedings - 19th Euromicro Conference on Digital System Design, DSD 2016
Place of PublicationPiscataway
PublisherInstitute of Electrical and Electronics Engineers
Pages599-606
Number of pages8
ISBN (Electronic)978-1-5090-2817-7
DOIs
Publication statusPublished - 26 Oct 2016
Event19th Euromicro Conference on Digital System Design (DSD 2016) - Limassol, Cyprus
Duration: 31 Aug 20162 Sep 2016
Conference number: 19
http://dsd-seaa2016.cs.ucy.ac.cy/index.php?p=DSD2016

Conference

Conference19th Euromicro Conference on Digital System Design (DSD 2016)
Abbreviated titleDSD 2016
CountryCyprus
CityLimassol
Period31/08/162/09/16
Internet address

Keywords

  • BLOCKS
  • CGRA
  • Energy Efficiency
  • Multi-Granular Arithmetic
  • Multiplication

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