Modeling static-order schedules in synchronous dataflow graphs

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Abstract

Abstract—Synchronous dataflow graphs (SDFGs) are used extensively to model streaming applications. An SDFG can be extended with scheduling decisions, allowing SDFG analysis to obtain properties like throughput or buffer sizes for the scheduled graphs. Analysis times depend strongly on the size of the SDFG. SDFGs can be statically scheduled using static-order schedules. The only generally applicable technique to model a staticorder schedule in an SDFG is to convert it to a homogeneous SDFG (HSDFG). This conversion may lead to an exponential increase in the size of the graph and to sub-optimal analysis results (e.g., for buffer sizes in multi-processors). We present a technique to model periodic static-order schedules directly in an SDFG. Experiments show that our technique produces more compact graphs compared to the technique that relies on a conversion to an HSDFG. This results in reduced analysis times for performance properties and tighter resource requirements.
Original languageDutch
Title of host publicationProceedings of the Design, Automation & Test in Europe Conference & Exhibition (DATE) 2012, 12-16 March 2012, Dresden, Germany
Place of PublicationPiscataway
PublisherInstitute of Electrical and Electronics Engineers
Pages775-780
ISBN (Print)978-3-9810801-8-6
Publication statusPublished - 2012
Event15th Design, Automation and Test in Europe Conference and Exhibition (DATE 2012) - ICC, Dresden, Germany
Duration: 12 Mar 201216 Mar 2012
Conference number: 15
https://www.date-conference.com/date12/

Conference

Conference15th Design, Automation and Test in Europe Conference and Exhibition (DATE 2012)
Abbreviated titleDATE 2012
CountryGermany
CityDresden
Period12/03/1216/03/12
Other
Internet address

Cite this

Damavandpeyma, M., Stuijk, S., Basten, T., Geilen, M. C. W., & Corporaal, H. (2012). Modeling static-order schedules in synchronous dataflow graphs. In Proceedings of the Design, Automation & Test in Europe Conference & Exhibition (DATE) 2012, 12-16 March 2012, Dresden, Germany (pp. 775-780). Institute of Electrical and Electronics Engineers.