Modeling and Validating Globally Asynchronous Design in Synchronous Frameworks.

M.R. Mousavi; P. Le Guernic; J.-P. Talpin; S.K. Shukla; T. Basten

doi:10.1109/DATE.2004.1268877

Modeling and Validating Globally Asynchronous Design in Synchronous Frameworks.

M.R. Mousavi, P. Le Guernic, J.-P. Talpin, S.K. Shukla, T. Basten

Electronic Systems

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic

14 Citations (Scopus)

Abstract

We lay a foundation for modeling and validation of asynchronous designs in a multi-clock synchronous programming model. This allows us to study properties of globally asynchronous systems using synchronous simulation and model-checking toolkits. Our approach can be summarized as automatic transformation of a design consisting of two asynchronously composed synchronous components into a fully synchronous multi-clock model preserving behavioral equivalence. The ultimate goal of this research is to provide the ability to model and build GALS systems in a fully synchronous design framework and deploy it on an asynchronous network preserving all properties of the system proven in the synchronous framework.

Original language	English
Title of host publication	7th Design, Automation and Test in Europe Conference and Exposition (DATE 04, Paris, France, February 18-20, 2004)
Place of Publication	Piscataway
Publisher	Institute of Electrical and Electronics Engineers
Pages	384-389
Volume	1
ISBN (Print)	0-7695-2085-5
DOIs	https://doi.org/10.1109/DATE.2004.1268877
Publication status	Published - 2004
Event	7th Design, Automation and Test in Europe Conference and Exposition (DATE 2004) - Paris, France Duration: 16 Feb 2004 → 20 Feb 2004 Conference number: 7

Conference

Conference	7th Design, Automation and Test in Europe Conference and Exposition (DATE 2004)
Abbreviated title	DATE 2004
Country/Territory	France
City	Paris
Period	16/02/04 → 20/02/04

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10.1109/DATE.2004.1268877

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Mousavi, M. R., Le Guernic, P., Talpin, J.-P., Shukla, S. K., & Basten, T. (2004). Modeling and Validating Globally Asynchronous Design in Synchronous Frameworks. In 7th Design, Automation and Test in Europe Conference and Exposition (DATE 04, Paris, France, February 18-20, 2004) (Vol. 1, pp. 384-389). Institute of Electrical and Electronics Engineers. https://doi.org/10.1109/DATE.2004.1268877

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title = "Modeling and Validating Globally Asynchronous Design in Synchronous Frameworks.",

abstract = "We lay a foundation for modeling and validation of asynchronous designs in a multi-clock synchronous programming model. This allows us to study properties of globally asynchronous systems using synchronous simulation and model-checking toolkits. Our approach can be summarized as automatic transformation of a design consisting of two asynchronously composed synchronous components into a fully synchronous multi-clock model preserving behavioral equivalence. The ultimate goal of this research is to provide the ability to model and build GALS systems in a fully synchronous design framework and deploy it on an asynchronous network preserving all properties of the system proven in the synchronous framework.",

author = "M.R. Mousavi and \{Le Guernic\}, P. and J.-P. Talpin and S.K. Shukla and T. Basten",

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Mousavi, MR, Le Guernic, P, Talpin, J-P, Shukla, SK & Basten, T 2004, Modeling and Validating Globally Asynchronous Design in Synchronous Frameworks. in 7th Design, Automation and Test in Europe Conference and Exposition (DATE 04, Paris, France, February 18-20, 2004). vol. 1, Institute of Electrical and Electronics Engineers, Piscataway, pp. 384-389, 7th Design, Automation and Test in Europe Conference and Exposition (DATE 2004), Paris, France, 16/02/04. https://doi.org/10.1109/DATE.2004.1268877

Modeling and Validating Globally Asynchronous Design in Synchronous Frameworks. / Mousavi, M.R.; Le Guernic, P.; Talpin, J.-P. et al.
7th Design, Automation and Test in Europe Conference and Exposition (DATE 04, Paris, France, February 18-20, 2004). Vol. 1 Piscataway: Institute of Electrical and Electronics Engineers, 2004. p. 384-389.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic

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AU - Basten, T.

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N2 - We lay a foundation for modeling and validation of asynchronous designs in a multi-clock synchronous programming model. This allows us to study properties of globally asynchronous systems using synchronous simulation and model-checking toolkits. Our approach can be summarized as automatic transformation of a design consisting of two asynchronously composed synchronous components into a fully synchronous multi-clock model preserving behavioral equivalence. The ultimate goal of this research is to provide the ability to model and build GALS systems in a fully synchronous design framework and deploy it on an asynchronous network preserving all properties of the system proven in the synchronous framework.

AB - We lay a foundation for modeling and validation of asynchronous designs in a multi-clock synchronous programming model. This allows us to study properties of globally asynchronous systems using synchronous simulation and model-checking toolkits. Our approach can be summarized as automatic transformation of a design consisting of two asynchronously composed synchronous components into a fully synchronous multi-clock model preserving behavioral equivalence. The ultimate goal of this research is to provide the ability to model and build GALS systems in a fully synchronous design framework and deploy it on an asynchronous network preserving all properties of the system proven in the synchronous framework.

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DO - 10.1109/DATE.2004.1268877

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BT - 7th Design, Automation and Test in Europe Conference and Exposition (DATE 04, Paris, France, February 18-20, 2004)

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ER -

Mousavi MR, Le Guernic P, Talpin JP, Shukla SK, Basten T. Modeling and Validating Globally Asynchronous Design in Synchronous Frameworks. In 7th Design, Automation and Test in Europe Conference and Exposition (DATE 04, Paris, France, February 18-20, 2004). Vol. 1. Piscataway: Institute of Electrical and Electronics Engineers. 2004. p. 384-389 doi: 10.1109/DATE.2004.1268877

Modeling and Validating Globally Asynchronous Design in Synchronous Frameworks.

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