Model-based MPSoC architecture synthesis for highly-demanding embedded applications

The recent spectacular progress in modern nanoelectronic technology enabled implementation of very complex multiprocessor systems on single chips (MPSoCs) and created a big stimulus towards development of high-performance systems for various highly-demanding embedded applications. In result, the increasingly complex and sophisticated MPSoCs are required to perform real-time computations to extremely tight schedules, with high demands regarding energy, power, area, and cost efficiency. Moreover, they are required to be flexible enough to enable reuse among different product versions, adherence to evolving standards or user requirements, and easy modification during their development or even their field use. This all results in serious design and development challenges, such as: multi-objective MPSoC optimisation, resolution of numerous complex design tradeoffs, reduction of the design productivity gap, time-to market and development costs without compromising quality, etc. The opportunities created can effectively be exploited only through use of more adequate application-specific system architectures and more integrated system IP modules, supported by new system-level design methods and EDA tools. This tutorial focuses on mastering the automatic architecture synthesis and application mapping for heterogeneous customisable multi-processor systems-on-chip (MPSoCs) based on configurable and extensible application-specific instruction-set processors (ASIPs). The MPSoC design technology based on adaptable ASIPs is able to deliver high performance, high flexibility and low energy consumption at the same time. It is relevant for a very broad range of modern applications and applicable to several implementation technologies. The tutorial presents the results of our analysis of the main problems that have to be solved and challenges to be faced in design of such heterogeneous customisable MPSoCs for modern demanding applications. It discusses the problems of architecture synthesis and application mapping involving multiobjective optimisation, adequate exploitation of multiple trade-offs, and coherent development of computing, communication and memory sub-systems for complex hard real-time embedded MPSoCs, as well as, proposes the model-based semi-automatic architecture synthesis methods and EDA-tools that enable effective and efficient solution of these problems.