Abstract
Conditions are outlined under which propagation delays in VLSI circuits can be achieved that are logarithmic in the wire lengths. These conditions are imposed by area requirements and the velocity of light.
| Original language | English |
|---|---|
| Pages (from-to) | 773-775 |
| Journal | IEEE Journal of Solid-State Circuits |
| Volume | 17 |
| Issue number | 4 |
| DOIs | |
| Publication status | Published - 1982 |
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