Method and apparatus for tuning a digital system

F. Pessolano (Inventor), R.I.M.P. Meijer (Inventor), J. Pineda de Gyvez (Inventor), M.J.M. Heijligers (Inventor)

Research output: PatentPatent publication

33 Downloads (Pure)


A digital system 1 comprises receiving means (5) for receiving one or more performance indicators or parameters from software (6) controlling the execution of an application (3). Based on the performance indicators received by the receiving means (5), a tuning circuit (7) is provided for tuning the frequency (f), supply voltage (Vdd) and/or the transistor threshold voltage (Vb) of the digital system (1). In addition, pipeline configuration means (8) are provided for configuring the pipeline of the digital system (1) based on a pipeline depth determined by selecting means (10). The selecting means (10) is configured to select the pipeline depth (Pd) based on the frequency (f), supply voltage (Vdd), transistor threshold voltage (Vb), and according to whether the application requires maximum throughput or minimum latency.

Original languageEnglish
Patent numberUS2010281245
IPCG06F 9/ 00 A I
Priority date10/01/06
Publication statusPublished - 4 Nov 2010


Dive into the research topics of 'Method and apparatus for tuning a digital system'. Together they form a unique fingerprint.

Cite this