We introduce a compact photodetector (PD) suitable for photonic interconnections on silicon ICs. In such applications, the optical sources and detectors are linked via waveguides in an interconnection layer which is on top of CMOS circuitry. The photonic devices are fabricated with wafer scale processing steps, guaranteeing compatibility towards future generation electronic IC processing.
In our approach, the optical signals propagating through the waveguides in the interconnection layer are coupled into the PDs via InP membrane waveguides. These coupling structures were designed using 3D modal analysis. Device simulation and fabrication are described in this paper.
|Title of host publication||Proceedings of the 11th Annual Symposium of the IEEE/LEOS Benelux Chapter, 30 November - 1 December 2006, Eindhoven, The Netherlands|
|Editors||A.M.J. Koonen, X.J.M. Leijtens|
|Place of Publication||Eindhoven|
|Publisher||Technische Universiteit Eindhoven|
|Publication status||Published - 2006|
|Event||11th Annual Symposium of the IEEE/LEOS Benelux Chapter - Eindhoven, Netherlands|
Duration: 30 Nov 2006 → 1 Dec 2006
|Conference||11th Annual Symposium of the IEEE/LEOS Benelux Chapter|
|Period||30/11/06 → 1/12/06|