Low voltage, low power folded-switching mixer with current-reuse in 0.18 μm CMOS

Vojkan Vidojkovic, Johan Van Der Tang, Arjan J. Leeuwenburgh, Arthur Van Roermund

Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

Abstract

The scaling of the CMOS technologies has a great impact on analog design. The most severe consequence is a reduction of the voltage supply. In this article, a new low-voltage folded-switching mixer with current-reuse, which operates at 1 V supply voltage, is discussed. The main advantages of the introduced mixer topology are: a high voltage gain, a low noise figure, an operation at low supply voltages and flexibility in terms of mixer redesign for operation at different supply voltages. In order to alleviate the mixer design for different set of specifications and to provide a designer with a mixer design procedure, insight into mixer operation is given by analyzing gain, noise figure and linearity. The mixer is designed in 0.18 μm CMOS technology. Taking into account the obtained simulation results at a supply voltage of 1 V (gain = 9 dB, NF = 12 dB, IIP3 = -l dBm) and with a power consumption of 2.8 mW, the presented folded-switching mixer with current-reuse outperforms many of, so far, published CMOS mixers.

Original languageEnglish
Title of host publication2004 IEEE International Symposium on Circuits and Systems - Proceedings
PagesI569-I572
Volume1
Publication statusPublished - 2004
Event2004 IEEE International Symposium on Circuits and Systems (ISCAS 2004) - Vancouver, Canada
Duration: 23 May 200426 May 2004

Conference

Conference2004 IEEE International Symposium on Circuits and Systems (ISCAS 2004)
Abbreviated titleISCAS 2004
Country/TerritoryCanada
CityVancouver
Period23/05/0426/05/04

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