Low frequency dithering technique for linearization of voltage mode class-D amplifiers

F. Arfaei Malekzadeh; R. Mahmoudi; A. van Roermund

doi:10.1109/SiRF.2013.6489431

Low frequency dithering technique for linearization of voltage mode class-D amplifiers

F. Arfaei Malekzadeh
, R. Mahmoudi
, A. van Roermund

Integrated Circuits

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

Abstract

This paper introduces a novel technique for simultaneous linearity and efficiency enhancement of class-D amplifiers by combining a low frequency sinusoid, known as dither, with a bandpass signal. The proposed technique improves the linearity due to dither averaging effect, and power efficiency, due to the reduction of reactive loss. The feasibility of the idea is verified through realization and measurement of a 65nm TSMC CMOS voltage mode class-D amplifier operating at 1 GHz. The drain efficiency is enhanced from 19.2 to 37 percent, while providing ACPR of -33dBc for the first adjacent WCDMA channel.

Original language	English
Title of host publication	2013 IEEE 13th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, SiRF 2013 - RWW 2013
Pages	57-59
Number of pages	3
DOIs	https://doi.org/10.1109/SiRF.2013.6489431
Publication status	Published - 2013
Event	2013 IEEE 13th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, SiRF 2013 - 2013 7th IEEE Radio and Wireless Week, RWW 2013 - Austin, TX, United States Duration: 21 Jan 2013 → 23 Jan 2013

Conference

Conference	2013 IEEE 13th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, SiRF 2013 - 2013 7th IEEE Radio and Wireless Week, RWW 2013
Country/Territory	United States
City	Austin, TX
Period	21/01/13 → 23/01/13

Keywords

class-D
dither
efficiency
linearity
load pull measurements
PAPR
Power amplifiers

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10.1109/SiRF.2013.6489431

Cite this

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title = "Low frequency dithering technique for linearization of voltage mode class-D amplifiers",

abstract = "This paper introduces a novel technique for simultaneous linearity and efficiency enhancement of class-D amplifiers by combining a low frequency sinusoid, known as dither, with a bandpass signal. The proposed technique improves the linearity due to dither averaging effect, and power efficiency, due to the reduction of reactive loss. The feasibility of the idea is verified through realization and measurement of a 65nm TSMC CMOS voltage mode class-D amplifier operating at 1 GHz. The drain efficiency is enhanced from 19.2 to 37 percent, while providing ACPR of -33dBc for the first adjacent WCDMA channel.",

keywords = "class-D, dither, efficiency, linearity, load pull measurements, PAPR, Power amplifiers",

author = "Malekzadeh, \{F. Arfaei\} and R. Mahmoudi and \{van Roermund\}, A.",

year = "2013",

doi = "10.1109/SiRF.2013.6489431",

language = "English",

isbn = "9781467315517",

pages = "57--59",

booktitle = "2013 IEEE 13th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, SiRF 2013 - RWW 2013",

note = "2013 IEEE 13th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, SiRF 2013 - 2013 7th IEEE Radio and Wireless Week, RWW 2013 ; Conference date: 21-01-2013 Through 23-01-2013",

}

Malekzadeh, FA, Mahmoudi, R & van Roermund, A 2013, Low frequency dithering technique for linearization of voltage mode class-D amplifiers. in 2013 IEEE 13th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, SiRF 2013 - RWW 2013., 6489431, pp. 57-59, 2013 IEEE 13th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, SiRF 2013 - 2013 7th IEEE Radio and Wireless Week, RWW 2013, Austin, TX, United States, 21/01/13. https://doi.org/10.1109/SiRF.2013.6489431

Low frequency dithering technique for linearization of voltage mode class-D amplifiers. / Malekzadeh, F. Arfaei; Mahmoudi, R.; van Roermund, A.
2013 IEEE 13th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, SiRF 2013 - RWW 2013. 2013. p. 57-59 6489431.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

TY - GEN

T1 - Low frequency dithering technique for linearization of voltage mode class-D amplifiers

AU - Malekzadeh, F. Arfaei

AU - Mahmoudi, R.

AU - van Roermund, A.

PY - 2013

Y1 - 2013

N2 - This paper introduces a novel technique for simultaneous linearity and efficiency enhancement of class-D amplifiers by combining a low frequency sinusoid, known as dither, with a bandpass signal. The proposed technique improves the linearity due to dither averaging effect, and power efficiency, due to the reduction of reactive loss. The feasibility of the idea is verified through realization and measurement of a 65nm TSMC CMOS voltage mode class-D amplifier operating at 1 GHz. The drain efficiency is enhanced from 19.2 to 37 percent, while providing ACPR of -33dBc for the first adjacent WCDMA channel.

AB - This paper introduces a novel technique for simultaneous linearity and efficiency enhancement of class-D amplifiers by combining a low frequency sinusoid, known as dither, with a bandpass signal. The proposed technique improves the linearity due to dither averaging effect, and power efficiency, due to the reduction of reactive loss. The feasibility of the idea is verified through realization and measurement of a 65nm TSMC CMOS voltage mode class-D amplifier operating at 1 GHz. The drain efficiency is enhanced from 19.2 to 37 percent, while providing ACPR of -33dBc for the first adjacent WCDMA channel.

KW - class-D

KW - dither

KW - efficiency

KW - linearity

KW - load pull measurements

KW - PAPR

KW - Power amplifiers

UR - https://www.scopus.com/pages/publications/84876004854

U2 - 10.1109/SiRF.2013.6489431

DO - 10.1109/SiRF.2013.6489431

M3 - Conference contribution

AN - SCOPUS:84876004854

SN - 9781467315517

SP - 57

EP - 59

BT - 2013 IEEE 13th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, SiRF 2013 - RWW 2013

T2 - 2013 IEEE 13th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, SiRF 2013 - 2013 7th IEEE Radio and Wireless Week, RWW 2013

Y2 - 21 January 2013 through 23 January 2013

ER -

Low frequency dithering technique for linearization of voltage mode class-D amplifiers

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