Logic Synthesis for Field Programmable Gate Arrays

A. Chojnacki

Logic Synthesis for Field Programmable Gate Arrays

A. Chojnacki

Research output: Contribution to conference › Other › Academic

Original language	English
Publication status	Published - 2000
Event	conference; Series ERASMUS-SOCRATES Seminars, Warsaw University of Technology, Faculty of Electronics, Warwaw, Poland, April 25-30, 2000; 2000-04-25; 2000-04-25 - Duration: 25 Apr 2000 → 25 Apr 2000

Conference

Conference	conference; Series ERASMUS-SOCRATES Seminars, Warsaw University of Technology, Faculty of Electronics, Warwaw, Poland, April 25-30, 2000; 2000-04-25; 2000-04-25
Period	25/04/00 → 25/04/00
Other	Series ERASMUS-SOCRATES Seminars, Warsaw University of Technology, Faculty of Electronics, Warwaw, Poland, April 25-30, 2000

Cite this

@conference{e87ca9c8a036480e98782b4014e39707,

title = "Logic Synthesis for Field Programmable Gate Arrays",

author = "A. Chojnacki",

year = "2000",

language = "English",

note = "conference; Series ERASMUS-SOCRATES Seminars, Warsaw University of Technology, Faculty of Electronics, Warwaw, Poland, April 25-30, 2000; 2000-04-25; 2000-04-25 ; Conference date: 25-04-2000 Through 25-04-2000",

}