Logic circuits with reduced complexity based on devices with higher functionality

G. Janßen; T.G. Roer, van de; U. Auer; F.J. Tegude; C. Pacha; K.F. Goser; P. Glösekötter; A. Förster; J. Malindretos; M.J. Kelly

Logic circuits with reduced complexity based on devices with higher functionality

G. Janßen
, T.G. Roer, van de
, U. Auer
, F.J. Tegude
, C. Pacha
, K.F. Goser
, P. Glösekötter
, A. Förster
, J. Malindretos
, M.J. Kelly

Photonic Integration

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

Original language	English
Title of host publication	2nd STW Workshop on Semiconductor Advances for Future Electronics (SAFE 99)
Pages	219-224
Publication status	Published - 1999
Event	2nd STW Workshop on Semiconductor Advances for Future Electronics (SAFE 99) - Mierlo, Netherlands Duration: 24 Nov 1999 → 25 Nov 1999

Conference

Conference	2nd STW Workshop on Semiconductor Advances for Future Electronics (SAFE 99)
Country/Territory	Netherlands
City	Mierlo
Period	24/11/99 → 25/11/99
Other	2nd STW Workshop on Semiconductor Advances for Future Electronics (SAFE 99), Mierlo, Netherlands, 24-25 November

Cite this

@inproceedings{5627b976314e44d1b7f0eb0d3429856f,

title = "Logic circuits with reduced complexity based on devices with higher functionality",

author = "G. Jan{\ss}en and \{Roer, van de\}, T.G. and U. Auer and F.J. Tegude and C. Pacha and K.F. Goser and P. Gl{\"o}sek{\"o}tter and A. F{\"o}rster and J. Malindretos and M.J. Kelly",

year = "1999",

language = "English",

pages = "219--224",

booktitle = "2nd STW Workshop on Semiconductor Advances for Future Electronics (SAFE 99)",

note = "2nd STW Workshop on Semiconductor Advances for Future Electronics (SAFE 99) ; Conference date: 24-11-1999 Through 25-11-1999",

}

Janßen, G, Roer, van de, TG, Auer, U, Tegude, FJ, Pacha, C, Goser, KF, Glösekötter, P, Förster, A, Malindretos, J & Kelly, MJ 1999, Logic circuits with reduced complexity based on devices with higher functionality. in 2nd STW Workshop on Semiconductor Advances for Future Electronics (SAFE 99). pp. 219-224, 2nd STW Workshop on Semiconductor Advances for Future Electronics (SAFE 99), Mierlo, Netherlands, 24/11/99.

TY - GEN

T1 - Logic circuits with reduced complexity based on devices with higher functionality

AU - Janßen, G.

AU - Roer, van de, T.G.

AU - Auer, U.

AU - Tegude, F.J.

AU - Pacha, C.

AU - Goser, K.F.

AU - Glösekötter, P.

AU - Förster, A.

AU - Malindretos, J.

AU - Kelly, M.J.

PY - 1999

Y1 - 1999

M3 - Conference contribution

SP - 219

EP - 224

BT - 2nd STW Workshop on Semiconductor Advances for Future Electronics (SAFE 99)

T2 - 2nd STW Workshop on Semiconductor Advances for Future Electronics (SAFE 99)

Y2 - 24 November 1999 through 25 November 1999

ER -