Local write and read assist circuitry for memory device

V. Sharma (Inventor), S. Cosemans (Inventor), W. Dehaene (Inventor), F. Catthoor (Inventor), M. Ashouei (Inventor), J. Huisken (Inventor)

Research output: PatentPatent publication

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Abstract

Memory device having complementary global and local bit-lines, the complementary local bit-lines being connectable to the complementary global bit-lines by means of a local write receiver which is configured for creating a full voltage swing on the complementary local bit lines from a reduced voltage swing on the complementary global bit lines. The local write receiver comprises a connection mechanism for connecting the local to the global bit-lines and a pair of cross-coupled inverters directly connected to the complementary local bit lines for converting the reduced voltage swing to the full voltage swing on the complementary local bit lines.

Original languageEnglish
Patent numberWO2012119988
IPCG11C 11/ 419 A I
Priority date4/03/11
Publication statusPublished - 13 Sep 2012
Externally publishedYes

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