Layout verification for fault and yield analysis

J. Pineda de Gyvez, J.A.G. Jess

Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

Original languageEnglish
Title of host publicationProceedings of the 2nd Symposium on Design Methodology(PRORISC), April, 1990
Pages89-98
Publication statusPublished - 1990

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