Laboratory test set-up for the assessment of PMU time synchronization requirements

Ravi Shankar Singh, Hossein Hooshyar, Luigi Vanfretti

Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

5 Citations (Scopus)


This paper presents the construction of a Hardware-in-the-loop laboratory test set-up designed to assess the time synchronization requirements of Phasor Measurement Units (PMUs). The test set-up also allows to investigate the effects of signal phase shifts caused by current and voltage transformers, errors in timing source and the impact of these errors when determining time synchronization compliance of PMUs. The paper also describes the structure of an IRIG-B time-sync real-time implementation, which allowed real-time hardware-in-the-loop simulation by providing a PMU with a high-accuracy timing source.

Original languageEnglish
Title of host publication2015 IEEE Eindhoven PowerTech, PowerTech 2015
Place of PublicationPiscataway
PublisherInstitute of Electrical and Electronics Engineers
Number of pages5
ISBN (Electronic)9781479976935
Publication statusPublished - 31 Aug 2015
Externally publishedYes
EventIEEE Eindhoven PowerTech, PowerTech 2015 - Eindhoven, Netherlands
Duration: 29 Jun 20152 Jul 2015


ConferenceIEEE Eindhoven PowerTech, PowerTech 2015


  • Hardware-in-the-Loop (HIL)
  • IRIG-B
  • Phasor Measurement Unit (PMU)
  • Real-Time Simulation


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