Abstract
An integration substrate for a system in package comprises a through-substrate via and a trench capacitor wherein with a trench filling that includes at least 4 elec. conductive capacitor-electrode layers in an alternating arrangement with dielec. layers. The capacitor-electrode layers are alternatingly connected to a resp. one of 2 capacitor terminals provided on the 1st or 2nd substrate side. The trench capacitor and the through-substrate via are formed in resp. trench openings and via openings in the semiconductor substrate, which have an equal lateral extension exceeding 10 micro m. This structure allows, among other advantages, a particularly cost-effective fabrication of the integration substrate because the via openings and the trench openings in the substrate can be fabricated simultaneously. [on SciFinder (R)]
| Original language | English |
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| Patent number | WO2008139393 |
| Publication status | Published - 20 Nov 2008 |