Abstract
Increasingly high capacity data transfer in storage area networking, high performance computing and server networks is placing extremely demanding performance requirements on next generation interconnection technology. Power consumption, physical size and latency in switch fabrics are increasing rapidly with data capacity and connectivity. Networks of tractable numbers of discrete SOAs and filters have now been studied in a number of testbeds showing scaling to Terabit/second capacity utilising wavelength striping. In this paper we study integrated circuit architectures to realise power efficiency in ultra-compact integrated routing circuits. This is expected to provide a key enabler for port-scalable interconnection. Exploiting the parallel processing of wavelength striped data in concert with new configurations of integrated photonic switching circuit, exploiting arrayed waveguide gratings and semiconductor optical amplifier technology, can lead to order of magnitude power efficiencies and capacity scaling for a given optical link latency.
| Original language | English |
|---|---|
| Title of host publication | Proceedings of the 12th Annual Symposium of the IEEE/LEOS Benelux Chapter, 17-18 December 2007, Brussels, Belgium |
| Editors | M. Delqué, Ph. Emplit, S.P. Gorza, P. Kockaert, X.J.M. Leijtens |
| Place of Publication | Brussels |
| Publisher | IEEE/LEOS |
| Pages | 155-158 |
| ISBN (Print) | 978-2-9600753-0-4 |
| Publication status | Published - 2007 |
| Event | 12th Annual Symposium of the IEEE/LEOS Benelux Chapter, December 17-18, 2007, Brussels, Belgium - Brussels, Belgium Duration: 17 Dec 2007 → 18 Dec 2007 |
Conference
| Conference | 12th Annual Symposium of the IEEE/LEOS Benelux Chapter, December 17-18, 2007, Brussels, Belgium |
|---|---|
| Country/Territory | Belgium |
| City | Brussels |
| Period | 17/12/07 → 18/12/07 |