Integrated Circuits for Fetal Heart Rate Monitoring with Dry and Capacitive Electrodes

This thesis aims to investigate integrated circuit solutions for fetal heart rate monitoring with dry and capacitive electrodes. It studies the characteristics of noise and motion artifacts (MA), which are the two main challenges of the application. Various front-end amplifier topologies are compared regarding their fundamental characteristics and responses to MAs. Multiple techniques, which are the VA-CA-switchable amplifier structure and the fast reset scheme, are proposed that could enhance the MA's resilience and improve signal quality. Finally, a 16-channel fully integrated system incorporating the proposed methods has been designed. A wearable prototype was developed using this IC and validated by in-vivo pregnant volunteer tests. The organization of the thesis is as follows: After the overall Introduction in Chapter 1, Chapter 2 introduces the background, including the application (fetal heart rate monitoring, dry and capacitive electrodes), state-of-the-art, and the main challenges. Chapter 3 presents the impedance and noise behavior analysis of different interface materials as a function of frequency. It is studied by modelling, simulation and experimental measurements. The results show that the inherent resistive noise of some fabrics (e.g., cotton, polyester) when used to form a capacitive electrode could outweigh the typical noise level of circuits for physiological sensing. Chapter 4 presents a comparison study between voltage amplifier (VA) and charge amplifier (CA), from the basic characteristics to their responses to artifacts (caused by motion or interference). Further, a VA-CA-switchable amplifier is proposed, allowing for adaptation of the amplifier type according to different situations, and enabling estimation of the body-to-electrode capacitance Ce in a passive way. Chapter 5 proposes an amplifier structure with a fast reset scheme. It enables MA recovery prior to saturation and includes a reconstruction algorithm to restore the waveform. It could therefore avoid the long recovery in typical dry and capacitive sensing systems and extend the system dynamic range. This IC-implemented fast-reset amplifier achieves 9x higher biasing resistance (1.8TΩ), 2x lower noise (2.3 µVrms in-band noise with a 10pF source capacitance), and the additional ability to deal with MAs compared to a similar conventional pseudo-resistor-biased amplifier. Chapter 6 presents a 16-channel fully ASIC-integrated system for fetal heart rate sensing, where its architecture and circuit design are specifically made compatible with dry and capacitive electrodes. The knowledge and proposals shown in the previous chapters are taken into account. A wearable prototype was developed using this IC, together with a wearable garment and an exemplary fHR extraction algorithm. It was validated with lab-generated abdominal signals and four pregnant volunteers. The in-vivo measurement results show that at least 3-minute data of sufficient quality with detectable fetal peaks (and fHR) can be acquired within a 24-minute recording for every volunteer. As an additional activity, Chapter 7 presents a feasibility study of capacitive ECG R-peak detection in a 3-Tesla MRI environment. It reuses the ASIC discussed in chapter 6 and shows its potential for being used in another application. Chapter 8 concludes the thesis.