Instruction buffering exploration for low energy embedded processors.

T. Aa, van der, M. Jayapala, F. Barat, G. Deconinck, R. Lauwereins, H. Corporaal, F. Catthoor

Research output: Contribution to journalArticleAcademicpeer-review

Abstract

For multimedia applications, loop buffering is an efficient mechanism to reduce the power in the instruction memory of embedded processors. Especially software controlled loop buffers are energy efficient. However current compilers do not fully take advantage of the possibilities of such loop buffers. This paper presents an algorithm to explore for an application or a set of applications what is the optimal loop buffer configuration and the optimal way to use this configuration. Results for the MediaBench application suite show an additional 35% reduction (on average) in energy in the instruction memory hierarchy as compared to traditional approaches to the loop buffer without any performance implications.
Original languageEnglish
Pages (from-to)341-351
Number of pages11
JournalJournal of Embedded Computing
Volume1
Issue number3
Publication statusPublished - 2005

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