InP/InGaAs photodetector on SOI photonic circuitry

P.R.A. Binetti; X.J.M. Leijtens; T. Vries, de; Y.S. Oei; L. Di Cioccio; J.-M. Fédéli; C. Lagahe; J. Van Campenhout; D. Thourhout, Van; P.J. Veldhoven, van; R. Nötzel; M.K. Smit

doi:10.1109/JPHOT.2010.2046151

InP/InGaAs photodetector on SOI photonic circuitry

P.R.A. Binetti, X.J.M. Leijtens, T. Vries, de, Y.S. Oei, L. Di Cioccio, J.-M. Fédéli, C. Lagahe, J. Van Campenhout, D. Thourhout, Van, P.J. Veldhoven, van, R. Nötzel, M.K. Smit

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Abstract

We present an InP-based membrane p-i-n photodetector on a silicon-on-insulator sample containing a Si-wiring photonic circuit that is suitable for use in optical interconnections on Si integrated circuits (ICs). The detector mesa footprint is 50 µm2, which is the smallest reported to date for this kind of device, and the junction capacitance is below 10 fF, which allows for high integration density and low dynamic power consumption. The measured detector responsivity and 3-dB bandwidth are 0.45 A/W and 33 GHz, respectively. The device fabrication is compatible with wafer-scale processing steps, guaranteeing compatibility toward future-generation electronic IC processing.

Original language	English
Pages (from-to)	299-305
Number of pages	7
Journal	IEEE Photonics Journal
Volume	2
Issue number	3
DOIs	https://doi.org/10.1109/JPHOT.2010.2046151
Publication status	Published - 2010

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title = "InP/InGaAs photodetector on SOI photonic circuitry",

abstract = "We present an InP-based membrane p-i-n photodetector on a silicon-on-insulator sample containing a Si-wiring photonic circuit that is suitable for use in optical interconnections on Si integrated circuits (ICs). The detector mesa footprint is 50 µm2, which is the smallest reported to date for this kind of device, and the junction capacitance is below 10 fF, which allows for high integration density and low dynamic power consumption. The measured detector responsivity and 3-dB bandwidth are 0.45 A/W and 33 GHz, respectively. The device fabrication is compatible with wafer-scale processing steps, guaranteeing compatibility toward future-generation electronic IC processing.",

author = "P.R.A. Binetti and X.J.M. Leijtens and {Vries, de}, T. and Y.S. Oei and {Di Cioccio}, L. and J.-M. F{\'e}d{\'e}li and C. Lagahe and {Van Campenhout}, J. and {Thourhout, Van}, D. and {Veldhoven, van}, P.J. and R. N{\"o}tzel and M.K. Smit",

year = "2010",

doi = "10.1109/JPHOT.2010.2046151",

language = "English",

volume = "2",

pages = "299--305",

journal = "IEEE Photonics Journal",

issn = "1943-0655",

publisher = "Institute of Electrical and Electronics Engineers",

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TY - JOUR

T1 - InP/InGaAs photodetector on SOI photonic circuitry

AU - Binetti, P.R.A.

AU - Leijtens, X.J.M.

AU - Vries, de, T.

AU - Oei, Y.S.

AU - Di Cioccio, L.

AU - Fédéli, J.-M.

AU - Lagahe, C.

AU - Van Campenhout, J.

AU - Thourhout, Van, D.

AU - Veldhoven, van, P.J.

AU - Nötzel, R.

AU - Smit, M.K.

PY - 2010

Y1 - 2010

N2 - We present an InP-based membrane p-i-n photodetector on a silicon-on-insulator sample containing a Si-wiring photonic circuit that is suitable for use in optical interconnections on Si integrated circuits (ICs). The detector mesa footprint is 50 µm2, which is the smallest reported to date for this kind of device, and the junction capacitance is below 10 fF, which allows for high integration density and low dynamic power consumption. The measured detector responsivity and 3-dB bandwidth are 0.45 A/W and 33 GHz, respectively. The device fabrication is compatible with wafer-scale processing steps, guaranteeing compatibility toward future-generation electronic IC processing.

AB - We present an InP-based membrane p-i-n photodetector on a silicon-on-insulator sample containing a Si-wiring photonic circuit that is suitable for use in optical interconnections on Si integrated circuits (ICs). The detector mesa footprint is 50 µm2, which is the smallest reported to date for this kind of device, and the junction capacitance is below 10 fF, which allows for high integration density and low dynamic power consumption. The measured detector responsivity and 3-dB bandwidth are 0.45 A/W and 33 GHz, respectively. The device fabrication is compatible with wafer-scale processing steps, guaranteeing compatibility toward future-generation electronic IC processing.

U2 - 10.1109/JPHOT.2010.2046151

DO - 10.1109/JPHOT.2010.2046151

M3 - Article

SN - 1943-0655

VL - 2

SP - 299

EP - 305

JO - IEEE Photonics Journal

JF - IEEE Photonics Journal

IS - 3

ER -

InP/InGaAs photodetector on SOI photonic circuitry

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