Information-driven general functional decomposition targeted to gate libraries

S.J. Bieganski

    Research output: ThesisPhd Thesis 1 (Research TU/e / Graduation TU/e)

    125 Downloads (Pure)

    Abstract

    Traditional circuit synthesis methods implemented in today’s automatic logic synthesis tools deal only with some very special cases of possible circuit structures and are not well adjusted to the current and future technologies and synthesis targets. Substantial improvement could only be achieved through development and implementation of a new generation of design paradigms, methods and tools, more suitable in the new situation. Modern micro-electronic technology enables building of extremely large circuits and systems, and offers a great diversity of logic building blocks, while the traditional methods are basically targeted to AND-ORNOT or MUX circuits, and require a sophisticated technology mapping for other target. However, even the most sophisticated technology mapping cannot guarantee proper final results, if the initial synthesis is performed without a good relation to the actual target. Moreover, in modern designs, the interconnections increasingly decide all important circuit features (area, speed, power dissipation), and a flexible multi-objective optimisation and trade-offs are indispensable. The information-driven approach to circuit synthesis has a potential to resolve all those issues. Within the project the main issues of library modelling for information-driven synthesis, multi-valued sub-function encoding etc. were researched, and a prototype synthesis method and corresponding EDA-tool were developed, that considerably differs from all other known methods and tools. The experimental results from the tool that implements the new method demonstrate that the method and tool targeted to the gate-based circuit deliver much better circuits than the other methods and demonstrate that the information-driven general decomposition produces very fast and compact gate-based circuits.
    Original languageEnglish
    QualificationDoctor of Philosophy
    Awarding Institution
    • Department of Electrical Engineering
    Supervisors/Advisors
    • Otten, Ralph, Promotor
    • Jóźwiak, Lech, Copromotor
    Award date25 Oct 2012
    Place of PublicationEindhoven
    Publisher
    Print ISBNs978-90-386-3243-8
    DOIs
    Publication statusPublished - 2012

    Fingerprint

    Decomposition
    Networks (circuits)
    Multiobjective optimization
    Microelectronics
    Energy dissipation

    Cite this

    Bieganski, S.J.. / Information-driven general functional decomposition targeted to gate libraries. Eindhoven : Technische Universiteit Eindhoven, 2012. 275 p.
    @phdthesis{21212c39b9414af79805485304a4685c,
    title = "Information-driven general functional decomposition targeted to gate libraries",
    abstract = "Traditional circuit synthesis methods implemented in today’s automatic logic synthesis tools deal only with some very special cases of possible circuit structures and are not well adjusted to the current and future technologies and synthesis targets. Substantial improvement could only be achieved through development and implementation of a new generation of design paradigms, methods and tools, more suitable in the new situation. Modern micro-electronic technology enables building of extremely large circuits and systems, and offers a great diversity of logic building blocks, while the traditional methods are basically targeted to AND-ORNOT or MUX circuits, and require a sophisticated technology mapping for other target. However, even the most sophisticated technology mapping cannot guarantee proper final results, if the initial synthesis is performed without a good relation to the actual target. Moreover, in modern designs, the interconnections increasingly decide all important circuit features (area, speed, power dissipation), and a flexible multi-objective optimisation and trade-offs are indispensable. The information-driven approach to circuit synthesis has a potential to resolve all those issues. Within the project the main issues of library modelling for information-driven synthesis, multi-valued sub-function encoding etc. were researched, and a prototype synthesis method and corresponding EDA-tool were developed, that considerably differs from all other known methods and tools. The experimental results from the tool that implements the new method demonstrate that the method and tool targeted to the gate-based circuit deliver much better circuits than the other methods and demonstrate that the information-driven general decomposition produces very fast and compact gate-based circuits.",
    author = "S.J. Bieganski",
    year = "2012",
    doi = "10.6100/IR735585",
    language = "English",
    isbn = "978-90-386-3243-8",
    publisher = "Technische Universiteit Eindhoven",
    school = "Department of Electrical Engineering",

    }

    Bieganski, SJ 2012, 'Information-driven general functional decomposition targeted to gate libraries', Doctor of Philosophy, Department of Electrical Engineering, Eindhoven. https://doi.org/10.6100/IR735585

    Information-driven general functional decomposition targeted to gate libraries. / Bieganski, S.J.

    Eindhoven : Technische Universiteit Eindhoven, 2012. 275 p.

    Research output: ThesisPhd Thesis 1 (Research TU/e / Graduation TU/e)

    TY - THES

    T1 - Information-driven general functional decomposition targeted to gate libraries

    AU - Bieganski, S.J.

    PY - 2012

    Y1 - 2012

    N2 - Traditional circuit synthesis methods implemented in today’s automatic logic synthesis tools deal only with some very special cases of possible circuit structures and are not well adjusted to the current and future technologies and synthesis targets. Substantial improvement could only be achieved through development and implementation of a new generation of design paradigms, methods and tools, more suitable in the new situation. Modern micro-electronic technology enables building of extremely large circuits and systems, and offers a great diversity of logic building blocks, while the traditional methods are basically targeted to AND-ORNOT or MUX circuits, and require a sophisticated technology mapping for other target. However, even the most sophisticated technology mapping cannot guarantee proper final results, if the initial synthesis is performed without a good relation to the actual target. Moreover, in modern designs, the interconnections increasingly decide all important circuit features (area, speed, power dissipation), and a flexible multi-objective optimisation and trade-offs are indispensable. The information-driven approach to circuit synthesis has a potential to resolve all those issues. Within the project the main issues of library modelling for information-driven synthesis, multi-valued sub-function encoding etc. were researched, and a prototype synthesis method and corresponding EDA-tool were developed, that considerably differs from all other known methods and tools. The experimental results from the tool that implements the new method demonstrate that the method and tool targeted to the gate-based circuit deliver much better circuits than the other methods and demonstrate that the information-driven general decomposition produces very fast and compact gate-based circuits.

    AB - Traditional circuit synthesis methods implemented in today’s automatic logic synthesis tools deal only with some very special cases of possible circuit structures and are not well adjusted to the current and future technologies and synthesis targets. Substantial improvement could only be achieved through development and implementation of a new generation of design paradigms, methods and tools, more suitable in the new situation. Modern micro-electronic technology enables building of extremely large circuits and systems, and offers a great diversity of logic building blocks, while the traditional methods are basically targeted to AND-ORNOT or MUX circuits, and require a sophisticated technology mapping for other target. However, even the most sophisticated technology mapping cannot guarantee proper final results, if the initial synthesis is performed without a good relation to the actual target. Moreover, in modern designs, the interconnections increasingly decide all important circuit features (area, speed, power dissipation), and a flexible multi-objective optimisation and trade-offs are indispensable. The information-driven approach to circuit synthesis has a potential to resolve all those issues. Within the project the main issues of library modelling for information-driven synthesis, multi-valued sub-function encoding etc. were researched, and a prototype synthesis method and corresponding EDA-tool were developed, that considerably differs from all other known methods and tools. The experimental results from the tool that implements the new method demonstrate that the method and tool targeted to the gate-based circuit deliver much better circuits than the other methods and demonstrate that the information-driven general decomposition produces very fast and compact gate-based circuits.

    U2 - 10.6100/IR735585

    DO - 10.6100/IR735585

    M3 - Phd Thesis 1 (Research TU/e / Graduation TU/e)

    SN - 978-90-386-3243-8

    PB - Technische Universiteit Eindhoven

    CY - Eindhoven

    ER -

    Bieganski SJ. Information-driven general functional decomposition targeted to gate libraries. Eindhoven: Technische Universiteit Eindhoven, 2012. 275 p. https://doi.org/10.6100/IR735585