Improved power modeling of DDR SDRAMs

K. Chandrasekar, K.B. Akesson, K.G.W. Goossens

Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

38 Citations (Scopus)

Abstract

Power modeling and estimation has become one of the most defining aspects in designing modern embedded systems. In this context, DDR SDRAM memories contribute significantly to system power consumption, but lack accurate and generic power models. The most popular SDRAM power model provided by Micron, is found to be inaccurate or insufficient for several reasons. First, it does not consider the power consumed when transitioning to power-down and self-refresh modes. Second, it employs the minimal timing constraints between commands from the SDRAM datasheets and not the actual duration between the commands as issued by an SDRAM memory controller. Finally, without adaptations, it can only be applied to a memory controller that employs a close-page policy and accesses a single SDRAM bank at a time. These critical issues with Micron's power model impact the accuracy and the validity of the power values reported by it and resolving them, forms the focus of our work. In this paper, we propose an improved SDRAM power model that estimates power consumption during the state transitions to power-saving states, employs an SDRAM command trace to get the actual timings between the commands issued and is generic and applicable to all DDRx SDRAMs and all memory controller policies and all degrees of bank interleaving. We quantitatively compare the proposed model against the unmodified Micron model on power and energy for DDR3-800. We show differences of up to 60% in energy-savings for the precharge power-down mode for a power-down duration of 14 cycles and up to 80% for the self-refresh mode for a self-refresh duration of 560 cycles.
Original languageEnglish
Title of host publicationProceedings of the 14th Euromicro Conference on Digital System Design 2001 (DSD'11), 31 August - 2 September 2011, Oulu, Finland
Place of PublicationPiscataway
PublisherInstitute of Electrical and Electronics Engineers
Pages99-108
ISBN (Print)978-1-4577-1048-3
DOIs
Publication statusPublished - 2011
Event14th Euromicro Conference on Digital System Design (DSD 2011) - Oulu, Finland
Duration: 31 Aug 20112 Sep 2011
Conference number: 14
http://dsmc2.eap.gr/dsd2011/

Conference

Conference14th Euromicro Conference on Digital System Design (DSD 2011)
Abbreviated titleDSD 2011
CountryFinland
CityOulu
Period31/08/112/09/11
Other"Architectures, Methods and Tools"
Internet address

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