Abstract
The available options in 3D IC design and manufacturing have different impact on the cost of a 3D System-on-Chip. Using the 3D cost model developed at IMEC, the cost of different system integration options is analyzed and the cost effectiveness of different technology solutions is demonstrated. The cost model is based on the IMEC 3D integration process flows and includes the cost of manufacturing equipment, fabrication facilities, personnel, and materials. Using the IMEC 3D cost model, the cost of various 3D stacking strategies is compared to single die (i.e. 2D) integration. In addition, the effect on cost of different Through-Silicon-Via (TSV) manufacturing technologies is evaluated. The effectiveness of different 3D testing strategies and their impact on system cost is also investigated.
| Original language | English |
|---|---|
| Title of host publication | 2009 IEEE International Conference on 3D System Integration |
| Place of Publication | Piscataway |
| Publisher | Institute of Electrical and Electronics Engineers |
| Pages | 146-150 |
| Number of pages | 5 |
| ISBN (Print) | 978-1-4244-4511-0 |
| DOIs | |
| Publication status | Published - Sept 2009 |
| Externally published | Yes |
| Event | 2009 IEEE International Conference on 3D System Integration (3DIC 2009) - San Francisco, United States Duration: 28 Sept 2009 → 30 Sept 2009 |
Conference
| Conference | 2009 IEEE International Conference on 3D System Integration (3DIC 2009) |
|---|---|
| Abbreviated title | 3DIC 2009 |
| Country/Territory | United States |
| City | San Francisco |
| Period | 28/09/09 → 30/09/09 |