Hyper-Framing: a High Speed Channel Coding and Data Processing Architecture for Optical and RF Communications. A Concept Designed for Efficient Hardware Implementation Supporting Deep Fade Error Correction

This paper describes a novel approach to real-time data processing and channel coding and interleaving for FPGAs providing data rates up to 100Gbps. The paper including a resource/performance adaptation of a byte-wise interleaver. The proposed architecture is suitable for free space optical (FSO) use cases, including ground-to-satellite and ground-to-ground links, characterized by turbulence-induced scintillation, beam wander and pointing errors, causing deep fades resulting in large gaps in the received data stream, which must be reconstructed.

Many of the underlying concepts described in this paper are based on CCSDS 131.0-B-4 (TM Synchronization and Channel Coding) however, these have been heavily adapted for this architecture, resulting in a system that is designed for efficient FPGA/ASIC implementation, providing a scalable system supporting parallel data processing techniques.

This process has been successfully implemented and used as the data source/sink (Digital Processor) and verified during the field tests of the Terabit Optical Communication Adaptive Terminal (TOmCAT) demonstration system. TOmCAT is a project led by TNO and supported by ESA through ARTES.