Higher-order DWA in bandpass delta-sigma modulators and its implementation

Jingjing Hu; J.A. Hegt; A.H.M. van Roermund; Sotir F. Ouzounov

doi:10.1109/ISCAS.2016.7527173

Higher-order DWA in bandpass delta-sigma modulators and its implementation

Jingjing Hu, J.A. Hegt, A.H.M. van Roermund, Sotir F. Ouzounov

Integrated Circuits

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

3 Citations (Scopus)

Abstract

This paper proposes a simple implementation of a higher-order data weighted averaging algorithm to spectrally shape mismatch errors of a multi-bit D/A converter in a bandpass (BP) delta-sigma modulator. The proposed implementation avoids the need for a complex and slow sorting function that is usually associated with a higher-order DWA algorithm. An algorithm based on updating two pointers is used, similar as the widely used first-order DWA algorithm. The implementation is based on a pulse density modulated DAC that is clocked at a 3x higher rate compared to the delta-sigma modulator clock to accurately implement the 1x and 3x weight factors that are required by the algorithm. The implementation can also be used in a generalized bandpass DWA algorithm that can be easily adjusted to tune the noise-shaping characteristic to different center frequencies.

Original language	English
Title of host publication	ISCAS 2016 - IEEE International Symposium on Circuits and Systems
Place of Publication	Piscataway
Publisher	Institute of Electrical and Electronics Engineers
Pages	73-76
Number of pages	4
ISBN (Electronic)	978-1-4799-5341-7
ISBN (Print)	978-1-4799-5342-4
DOIs	https://doi.org/10.1109/ISCAS.2016.7527173
Publication status	Published - 29 Jul 2016
Event	2016 IEEE International Symposium on Circuits and Systems (ISCAS 2016) - Montreal, Canada Duration: 22 May 2016 → 25 May 2016

Conference

Conference	2016 IEEE International Symposium on Circuits and Systems (ISCAS 2016)
Abbreviated title	ISCAS 2016
Country/Territory	Canada
City	Montreal
Period	22/05/16 → 25/05/16

Keywords

analog-to-digital converters
bandpass delta-sigma modulator
data-weighted averaging (DWA)
sigma-delta modulator

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10.1109/ISCAS.2016.7527173

Cite this

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title = "Higher-order DWA in bandpass delta-sigma modulators and its implementation",

abstract = "This paper proposes a simple implementation of a higher-order data weighted averaging algorithm to spectrally shape mismatch errors of a multi-bit D/A converter in a bandpass (BP) delta-sigma modulator. The proposed implementation avoids the need for a complex and slow sorting function that is usually associated with a higher-order DWA algorithm. An algorithm based on updating two pointers is used, similar as the widely used first-order DWA algorithm. The implementation is based on a pulse density modulated DAC that is clocked at a 3x higher rate compared to the delta-sigma modulator clock to accurately implement the 1x and 3x weight factors that are required by the algorithm. The implementation can also be used in a generalized bandpass DWA algorithm that can be easily adjusted to tune the noise-shaping characteristic to different center frequencies.",

keywords = "analog-to-digital converters, bandpass delta-sigma modulator, data-weighted averaging (DWA), sigma-delta modulator",

author = "Jingjing Hu and J.A. Hegt and {van Roermund}, A.H.M. and Ouzounov, {Sotir F.}",

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note = "2016 IEEE International Symposium on Circuits and Systems (ISCAS 2016), ISCAS 2016 ; Conference date: 22-05-2016 Through 25-05-2016",

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Hu, J, Hegt, JA, van Roermund, AHM & Ouzounov, SF 2016, Higher-order DWA in bandpass delta-sigma modulators and its implementation. in ISCAS 2016 - IEEE International Symposium on Circuits and Systems., 7527173, Institute of Electrical and Electronics Engineers, Piscataway, pp. 73-76, 2016 IEEE International Symposium on Circuits and Systems (ISCAS 2016), Montreal, Canada, 22/05/16. https://doi.org/10.1109/ISCAS.2016.7527173

Higher-order DWA in bandpass delta-sigma modulators and its implementation. / Hu, Jingjing; Hegt, J.A.; van Roermund, A.H.M. et al.
ISCAS 2016 - IEEE International Symposium on Circuits and Systems. Piscataway: Institute of Electrical and Electronics Engineers, 2016. p. 73-76 7527173.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

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AB - This paper proposes a simple implementation of a higher-order data weighted averaging algorithm to spectrally shape mismatch errors of a multi-bit D/A converter in a bandpass (BP) delta-sigma modulator. The proposed implementation avoids the need for a complex and slow sorting function that is usually associated with a higher-order DWA algorithm. An algorithm based on updating two pointers is used, similar as the widely used first-order DWA algorithm. The implementation is based on a pulse density modulated DAC that is clocked at a 3x higher rate compared to the delta-sigma modulator clock to accurately implement the 1x and 3x weight factors that are required by the algorithm. The implementation can also be used in a generalized bandpass DWA algorithm that can be easily adjusted to tune the noise-shaping characteristic to different center frequencies.

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Higher-order DWA in bandpass delta-sigma modulators and its implementation

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