Abstract
The demands for ever higher data rates, overall system cost reduction and improved power efficiency, and the advances of nm IC technologies, are pushing the DA converters to ever higher speeds, in terms of bandwidth and sampling rate. Next to speed, linearity is a big issue, especially for multi-band, multi-standard and multi-mode operation. These demands are particularly acute in wireless communication.
This presentation will discuss the fundamental issues related to speed and linearity in DAs and analyze and classify the dominant implementation issues. Next, and based on that, it will show effective ways to shift the boundaries, thereby focusing on calibration methods and mixer-DAC co-integration. Actual design examples illustrate these concepts.
This presentation will discuss the fundamental issues related to speed and linearity in DAs and analyze and classify the dominant implementation issues. Next, and based on that, it will show effective ways to shift the boundaries, thereby focusing on calibration methods and mixer-DAC co-integration. Actual design examples illustrate these concepts.
| Original language | English |
|---|---|
| Publication status | Published - 9 Feb 2017 |
| Event | 64th IEEE International Solid-State Circuits Conference, ISSCC 2017 - San Francisco, United States Duration: 5 Feb 2017 → 9 Feb 2017 Conference number: 64 |
Conference
| Conference | 64th IEEE International Solid-State Circuits Conference, ISSCC 2017 |
|---|---|
| Abbreviated title | ISSCC 2017 |
| Country/Territory | United States |
| City | San Francisco |
| Period | 5/02/17 → 9/02/17 |