High-speed linear digital-to-analog converters

Research output: Contribution to conferencePaper

Abstract

The demands for ever higher data rates, overall system cost reduction and improved power efficiency, and the advances of nm IC technologies, are pushing the DA converters to ever higher speeds, in terms of bandwidth and sampling rate. Next to speed, linearity is a big issue, especially for multi-band, multi-standard and multi-mode operation. These demands are particularly acute in wireless communication.
This presentation will discuss the fundamental issues related to speed and linearity in DAs and analyze and classify the dominant implementation issues. Next, and based on that, it will show effective ways to shift the boundaries, thereby focusing on calibration methods and mixer-DAC co-integration. Actual design examples illustrate these concepts.
Original languageEnglish
Publication statusPublished - 9 Feb 2017
Event64th IEEE International Solid-State Circuits Conference (ISSCC 2017) - San Francisco, United States
Duration: 5 Feb 20179 Feb 2017
Conference number: 61

Conference

Conference64th IEEE International Solid-State Circuits Conference (ISSCC 2017)
Abbreviated titleISSCC 2017
CountryUnited States
CitySan Francisco
Period5/02/179/02/17

Cite this

van Roermund, A. H. M., & Radulov, G. I. (2017). High-speed linear digital-to-analog converters. Paper presented at 64th IEEE International Solid-State Circuits Conference (ISSCC 2017), San Francisco, United States.