Skip to main navigation Skip to search Skip to main content

Hierarchical wire routing of gate arrays

  • P.A.C.M. Nuijten

Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

Original languageEnglish
Title of host publicationThe integrated circuit design book
Subtitle of host publicationpapers on VLSI design methodology from the ICD-NELSIS project
EditorsP. Dewilde
Place of PublicationDelft
PublisherDelft University Press
Pages7.55-7.130
Number of pages76
ISBN (Print)90-6275-246-2
Publication statusPublished - 1986

Cite this