Heterogeneous multi-processor for the management of real-time video & graphics streams

M.T.J. Strik; A.H. Timmer; J. Meerbergen, van; E. Waterlander; F. Harmsze; A.W.P. Vaassen; L. Sevat; M. Oosterhuis; G.J. Rootselaar, van; H. Herten, van; Egbert Jaspers; J. Janssen; G. Essink; J.A.J. Leijten

doi:10.1109/ISSCC.2000.839769

Heterogeneous multi-processor for the management of real-time video & graphics streams

M.T.J. Strik, A.H. Timmer, J. Meerbergen, van, E. Waterlander, F. Harmsze, A.W.P. Vaassen, L. Sevat, M. Oosterhuis, G.J. Rootselaar, van, H. Herten, van, Egbert Jaspers, J. Janssen, G. Essink, J.A.J. Leijten

Electronic Systems

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

Abstract

A chip for the concurrent processing of many real time multi-media streams has three independent and uncorrelated video input channels. They are stored in and retrieved from an external SDRAM to be displayed on a TV set using PC-like multiple windows. Graphics data generated by an external CPU is read from SDRAM to be blended with the composition of the video.

Original language	English
Title of host publication	IEEE International 47th Solid-State Circuits Conference (ISSCC 2000) : Digest of Technical Papers, 7-9 February 2000
Editors	J.H. Wuorinen
Place of Publication	New York
Publisher	Institute of Electrical and Electronics Engineers
Pages	244-245
ISBN (Print)	0-7803-5853-8
DOIs	https://doi.org/10.1109/ISSCC.2000.839769 https://doi.org/10.1109/ISSCC.2000.839769
Publication status	Published - 2000
Event	47th IEEE International Solid-State Circuits Conference, ISSCC 2000 - San Francisco, United States Duration: 7 Feb 2000 → 9 Feb 2000 Conference number: 47

Conference

Conference	47th IEEE International Solid-State Circuits Conference, ISSCC 2000
Abbreviated title	ISSCC 2000
Country/Territory	United States
City	San Francisco
Period	7/02/00 → 9/02/00

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Strik, M. T. J., Timmer, A. H., Meerbergen, van, J., Waterlander, E., Harmsze, F., Vaassen, A. W. P., Sevat, L., Oosterhuis, M., Rootselaar, van, G. J., Herten, van, H., Jaspers, E., Janssen, J., Essink, G., & Leijten, J. A. J. (2000). Heterogeneous multi-processor for the management of real-time video & graphics streams. In J. H. Wuorinen (Ed.), IEEE International 47th Solid-State Circuits Conference (ISSCC 2000) : Digest of Technical Papers, 7-9 February 2000 (pp. 244-245). Institute of Electrical and Electronics Engineers. https://doi.org/10.1109/ISSCC.2000.839769, https://doi.org/10.1109/ISSCC.2000.839769

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title = "Heterogeneous multi-processor for the management of real-time video & graphics streams",

abstract = "A chip for the concurrent processing of many real time multi-media streams has three independent and uncorrelated video input channels. They are stored in and retrieved from an external SDRAM to be displayed on a TV set using PC-like multiple windows. Graphics data generated by an external CPU is read from SDRAM to be blended with the composition of the video.",

author = "M.T.J. Strik and A.H. Timmer and {Meerbergen, van}, J. and E. Waterlander and F. Harmsze and A.W.P. Vaassen and L. Sevat and M. Oosterhuis and {Rootselaar, van}, G.J. and {Herten, van}, H. and Egbert Jaspers and J. Janssen and G. Essink and J.A.J. Leijten",

year = "2000",

doi = "10.1109/ISSCC.2000.839769",

language = "English",

isbn = "0-7803-5853-8",

pages = "244--245",

editor = "J.H. Wuorinen",

booktitle = "IEEE International 47th Solid-State Circuits Conference (ISSCC 2000) : Digest of Technical Papers, 7-9 February 2000",

publisher = "Institute of Electrical and Electronics Engineers",

address = "United States",

note = "47th IEEE International Solid-State Circuits Conference, ISSCC 2000, ISSCC 2000 ; Conference date: 07-02-2000 Through 09-02-2000",

}

Strik, MTJ, Timmer, AH, Meerbergen, van, J, Waterlander, E, Harmsze, F, Vaassen, AWP, Sevat, L, Oosterhuis, M, Rootselaar, van, GJ, Herten, van, H, Jaspers, E, Janssen, J, Essink, G & Leijten, JAJ 2000, Heterogeneous multi-processor for the management of real-time video & graphics streams. in JH Wuorinen (ed.), IEEE International 47th Solid-State Circuits Conference (ISSCC 2000) : Digest of Technical Papers, 7-9 February 2000. Institute of Electrical and Electronics Engineers, New York, pp. 244-245, 47th IEEE International Solid-State Circuits Conference, ISSCC 2000, San Francisco, California, United States, 7/02/00. https://doi.org/10.1109/ISSCC.2000.839769, https://doi.org/10.1109/ISSCC.2000.839769

Heterogeneous multi-processor for the management of real-time video & graphics streams. / Strik, M.T.J.; Timmer, A.H.; Meerbergen, van, J. et al.
IEEE International 47th Solid-State Circuits Conference (ISSCC 2000) : Digest of Technical Papers, 7-9 February 2000. ed. / J.H. Wuorinen. New York: Institute of Electrical and Electronics Engineers, 2000. p. 244-245.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

TY - GEN

T1 - Heterogeneous multi-processor for the management of real-time video & graphics streams

AU - Strik, M.T.J.

AU - Timmer, A.H.

AU - Meerbergen, van, J.

AU - Waterlander, E.

AU - Harmsze, F.

AU - Vaassen, A.W.P.

AU - Sevat, L.

AU - Oosterhuis, M.

AU - Rootselaar, van, G.J.

AU - Herten, van, H.

AU - Jaspers, Egbert

AU - Janssen, J.

AU - Essink, G.

AU - Leijten, J.A.J.

N1 - Conference code: 47

PY - 2000

Y1 - 2000

N2 - A chip for the concurrent processing of many real time multi-media streams has three independent and uncorrelated video input channels. They are stored in and retrieved from an external SDRAM to be displayed on a TV set using PC-like multiple windows. Graphics data generated by an external CPU is read from SDRAM to be blended with the composition of the video.

AB - A chip for the concurrent processing of many real time multi-media streams has three independent and uncorrelated video input channels. They are stored in and retrieved from an external SDRAM to be displayed on a TV set using PC-like multiple windows. Graphics data generated by an external CPU is read from SDRAM to be blended with the composition of the video.

U2 - 10.1109/ISSCC.2000.839769

DO - 10.1109/ISSCC.2000.839769

M3 - Conference contribution

SN - 0-7803-5853-8

SP - 244

EP - 245

BT - IEEE International 47th Solid-State Circuits Conference (ISSCC 2000) : Digest of Technical Papers, 7-9 February 2000

A2 - Wuorinen, J.H.

PB - Institute of Electrical and Electronics Engineers

CY - New York

T2 - 47th IEEE International Solid-State Circuits Conference, ISSCC 2000

Y2 - 7 February 2000 through 9 February 2000

ER -

Strik MTJ, Timmer AH, Meerbergen, van J, Waterlander E, Harmsze F, Vaassen AWP et al. Heterogeneous multi-processor for the management of real-time video & graphics streams. In Wuorinen JH, editor, IEEE International 47th Solid-State Circuits Conference (ISSCC 2000) : Digest of Technical Papers, 7-9 February 2000. New York: Institute of Electrical and Electronics Engineers. 2000. p. 244-245 doi: 10.1109/ISSCC.2000.839769, http://dx.doi.org/10.1109/ISSCC.2000.839769

Heterogeneous multi-processor for the management of real-time video & graphics streams

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