Hard-real-time scheduling on a weakly programmable multi-core processor with application to multi-standard channel decoding

W. Tong, O. Moreira, R.J.M. Nas, C.H. Berkel, van

Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

2 Citations (Scopus)
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Abstract

In Software Defined Radio (SDR), some or all of the physical layer functions are implemented by software. In this paper, we focus on the channel decoding part of SDR. We use Synchronous Data Flow (SDF) and Cyclo-Static Data Flow (CSDF) graphs to model channel decoding functions. We want to tackle the problem of scheduling a dynamic mix of multiple radios with throughput constraints on a multi-standard multi-channel channel decoder. The decoder consists of a Micro-Controller Unit (MCU) and several weakly programmable Hardware Units (HU) with internal states and very limited buffer sizes. Each HU has a Round Robin (RR) scheduler hosted on the MCU. To reduce scheduling overhead, RR schedules applications at coarse granularity. Due to limited buffer sizes, some tasks of an application are tightly coupled. We propose a so-called coupled scheduling policy, which is a relaxation of strict gang scheduling, to concurrently schedule these tasks. We propose a technique to model coupled scheduling in (C)SDF graphs. Under our scheduling policies, we also design an admission controller to guarantee the throughput requirements of running applications. To verify the approach, we have implemented a simulation system to run DVB-SH and DVB-T concurrently and independently.
Original languageEnglish
Title of host publicationProceedings of the 2012 IEEE 18th Real-Time and Embedded Technology and Applications Symposium (RTAS, Beijing, China, April 16-19, 2012)
PublisherIEEE Computer Society
Pages151-160
DOIs
Publication statusPublished - 2012

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