General decomposition of incompletely specified sequential machines with multi-stage behavior realisation

A.S. Slusarczyk, L. Jozwiak

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    6 Citations (Scopus)

    Abstract

    This paper is devoted to decomposition of sequential machines, discrete functions and relations. Sequential machine decomposition consists in representation of a given machine as a network of collaborating partial machines that together realize behavior of the given machine. A good understanding of possible decomposition structures and of conditions under which the corresponding structures exist is a prerequisite for any adequate circuit or system synthesis. The paper discusses the theory of general decomposition of incompletely specified sequential machines with multi-state behavior realization. The central point of this theory is a constructive theorem on the existence of the general decomposition structures and conditions under which the corresponding structures exist. The theory of general decomposition presented in this paper is the most general known theory of the binary, multi-valued and symbolic sequential and combinational discrete network structures. The correct circuit generator defined by the general decomposition theorem covers all other known structural models of sequential and combinational circuits as its special cases. Using this theory, in recent years we developed a number of effective and efficient methods and EDA tools for sequential and combinational circuit synthesis that consistently construct much better circuits than other academic and commercial state-of-the-art synthesis tools. This demonstrates the practical soundness of our theory. This theory can be applied to any sort of binary, multi-valued and symbolic systems expressed as networks of relations, functions or sequential machines, and can be very useful in such fields as circuit and architecture synthesis of VLSI systems, knowledge engineering, machine learning, neural network training, pattern analysis, etc.
    Original languageEnglish
    Pages (from-to)445-492
    Number of pages48
    JournalJournal of Systems Architecture
    Volume50
    Issue number8
    DOIs
    Publication statusPublished - 2004

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