Gate array placement by simulated annealing

R.J. Jongen

Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

Original languageEnglish
Title of host publicationThe integrated circuit design book
Subtitle of host publicationpapers on VLSI design methodology from the ICD-NELSIS project
EditorsP. Dewilde
Place of PublicationDelft
PublisherDelft University Press
Number of pages27
ISBN (Print)90-6275-246-2
Publication statusPublished - 1986

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