Abstract
As graphics processing units (GPUs) are becoming increasingly popular for general purpose workloads (GPGPU), the question arises how such processors will evolve architecturally in the near future. In this work, we identify and discuss trade-offs for three GPU architecture parameters: active thread count, compute-memory ratio, and cluster and warp sizing. For each parameter, we propose changes to improve GPU design, keeping in mind trends such as dark silicon and the increasing popularity of GPGPU architectures. A key-enabler is dynamism and workload-adaptiveness, enabling among others: dynamic register file sizing, latency aware scheduling, roofline-aware DVFS, run-time cluster fusion, and dynamic warp sizing.
Original language | English |
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Title of host publication | Proceedings of Design, Automation & Test in Europe Conference & Exhibition (DATE), 2013, 18-22 March 2013, Grenoble, France |
Place of Publication | Grenoble |
Publisher | Institute of Electrical and Electronics Engineers |
Pages | 392-395 |
DOIs | |
Publication status | Published - 2013 |
Event | 16th Design, Automation and Test in Europe Conference and Exhibition (DATE 2013) - Grenoble, France Duration: 18 Mar 2013 → 22 Mar 2013 Conference number: 16 https://www.date-conference.com/date13/ |
Conference
Conference | 16th Design, Automation and Test in Europe Conference and Exhibition (DATE 2013) |
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Abbreviated title | DATE 2013 |
Country/Territory | France |
City | Grenoble |
Period | 18/03/13 → 22/03/13 |
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Internet address |