Abstract
This paper presents an overview of frequency synthesizers for RF transceivers. Commonly used architectures are discussed as well as their most challenging building blocks, i.e. the VCO and the high-speed frequency dividers. High performance PLLs demand optimal technology processes. Technology requirements will be indicated during the discussions.
| Original language | English |
|---|---|
| Title of host publication | 2003 Proceedings of the Bipolar/BiCMOS Circuits and Technology Meeting (IEEE Cat. No.03CH37440) |
| Publisher | Institute of Electrical and Electronics Engineers |
| Pages | 189-196 |
| Number of pages | 8 |
| ISBN (Print) | 0-7803-7800-8 |
| DOIs | |
| Publication status | Published - 2003 |
| Externally published | Yes |
| Event | 2003 BIPOLAR/BICMOS Circuits and Technology Meeting - Toulouse, France Duration: 28 Sept 2003 → 30 Sept 2003 |
Conference
| Conference | 2003 BIPOLAR/BICMOS Circuits and Technology Meeting |
|---|---|
| Country/Territory | France |
| City | Toulouse |
| Period | 28/09/03 → 30/09/03 |